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a program to output a specified image to a stream of integers for VHDL file input

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fanwel

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Hi all;

How to write a program to output a specified image to a stream of integers in Matlab? The file later will be used as an input file in vhdl. I have found 1 example but I don't understand much. Can anyone help me..Below is the Matlab code that I make as my reference:

function m2vhdl(input_bmp,output_bin);
% detail: a program to output a specified image to a stream of
% integers for VHDL file input
% parameters: input_bmp - file to convert to bin format
% output_bin - file ready for vhdl file input

I = LoadImage(input_bmp);
J = int16(I);
K = double(J);
K = K';
M = reshape(K,128*128,1);
fid = fopen(output_bin,'wb');
fprintf(fid,'%d\n',M);
fclose(fid);

Need helps..thank you
 

The LoadImage() function is not in the standard Matlab libraries: try imread() instead.
If your image is in grayscale the rest of the code makes sense, otherwise you have to split the RGB planes somehow.
The reshape() function is used to convert from 2D data to a vector: you should use numel(K) instead of 128*128 there.

Bye. Dave
 

Hi dave9000,

What mean by K=K' function? Is it transpose the K?
Thank for reply
 

Yes, K' is a transpose function

How do you plan on inputting these values into VHDL. Is this some kind of co-simulation with simulink/modelsim, or to you plan on transfering the data to real hardware?
The former is quite simple, but the latter is a lot more involved.
 

Hi TrickyDicky,

I want to simulate with modelsim for test the code and then later will transferring the data to real hardware (FPGA).
I plan to take the input data by cascade into 3x3 matrix. I have write the VHDL code where the input data 3x3 matrix will insert into the FPGA and do the next process. It is possible? Thank for reply
 

If I were in you I'd write some software tool (in Matlab, C, whatever) to convert the image into a data format suitable for your final application.
For example, suppose that your FPGA is going to take raw data from an ADC.
First you convert a JPG into a text (or binary) file using Matlab.
Then, in simulation, you write a testbench that load the input file and feed the data to the device under test.
Later, with the real FPGA, you will pass the same file to your test equipment (e.g. a NI GPIO board) to emulate your ADC - if you really need this verification step.

For other applications you may need to packetize the data, build a protocol layer, etc...
 

If you're using modelsim, it is possible to read and write bitmaps in VHDL. Its a bit of a fudge, but it is possible (I have libraries for it).

But the question is what is your final application? are you going to be processing video? or just single images? Have you considered what communication method you are going to use to get data in and out of your FPGA?
 

Hi all,

Actually my application is to have an output of a coefficients of a matrix as the input is a vector of a matrix (3x3 matrix) of 2D image.
The image size is 128*128 grayscale image. I try to convert the image file into a binary file in Matlab. Then I want the file to be loaded in VHDL/FPGA as an input to the system. Then the process of addition and subtraction will be executed and the final output is the coefficients of a matrix.

Sorry TrickyDicky, what mean by "Have you considered what communication method you are going to use to get data in and out of your FPGA?" I never play with this situation (image processing). Need your guides,thank for reply
 

It would be easiest if you got matlab to output a text file, as text IO is fairly straight forward in VHDL testbenches. Binary isnt so easy. You havent really been very clear with your explination. Is your input an image, or an array of co-efficients, or both? Could you post some VHDL code?

The question I asked has nothing to do with image processing - but when you have real hardware you will need some method of getting data to and from the FPGA. The easiest is probably an RS232 connection (there should be a core available on opencores.org) or for harder (and faster) connections you could consider ethernet or similar.
 

Hi TrickyDicky,

My input is an array of co-efficients. I attach some VHDL code for my project. Hope you can help, thank for reply
 

Attachments

  • haar.txt
    2.6 KB · Views: 57

that code is just a load of component declarations, and so doesnt mean a lot, and does not do anything.
 

Hi TrickyDicky,

Sorry, I attach the full main code of my project. Hope you can help,thank for reply
 

Attachments

  • haar.doc
    41 KB · Views: 94

Are you just doing a convolution over a 4x4 window in an image? you have a 4x4 matrix for convultion? I dont see anywhere where the image is input into this?
 

fanwel,
if I read it correctly, the data input (D) of the top entity (haar) is never used!
How is your FPGA going to get the data it is supposed to process?
You don't have to think at FPGA processing as "maths" (i.e. equations, variables, etc...) but as a "flow", something along this line:

1. a single byte enters the D port and is stored into a register (or a RAM buffer, a FIFO, whatever)
2. the data is taken from the register/buffer and processed; intermediate data are stored in registers/RAM/etc...
3. step 1 and 2 are repeated N times, each requiring X clock cycles!
4 . at the end the result is output to port DV (and some flag is risen)

About point 1: there are a LOT of open points here: where the data come from? in which sequence? data rate? how the source knows you already fetched the data? how do you know the first byte is available? etc...
And you should ask yourself similar questions for all the other points.
The key is to think about which REAL SYNTHESIZABLE HARDWARE can possible perform your task.
 

dave9000 said:
fanwel,
if I read it correctly, the data input (D) of the top entity (haar) is never used!
Click to expand...

yes it is, its connected to the window4x4 component instantiation

But overall I agree - the spec isnt very well put forward on this page. And many previous posts by the OP show a poor understanding of digital logic. This is a complicated project for someone who has a poor hardware understanding.
 

Hi TrickyDicky and dave,

I really need your helps. I have try to study on this topic and try to write the code many times. But as you said still not in the right way.
Can you give one example vhdl code similar to this topic? I really need a guide with this and I running out of time . I appreciate your helps
 

you still havent specified exactly what you're trying to do. Are you trying to do a Haar wavelet transform to get an output image? What is the application?
 

Hi TrickyDicky,

My application is for image compression, but I only concern on transform only (not include quantise and entropy coding). This transform will use Haar wavelet algorithm to process the image, which are averaging ((A+B)/2) and differencing (B-C) algorithm. The final output is coefficients of the image. Thank for reply..

---------- Post added at 08:57 ---------- Previous post was at 08:48 ----------

Hi TrickyDicky,

My application is for image compression, but I only concern on transform only (not include quantise and entropy coding). This transform will use Haar wavelet algorithm to process the image, which are averaging ((A+B)/2) and differencing (B-C) algorithm. The final output is coefficients of the image. Thank for reply..
 

where do A B and C come from? Im not an algorithms guy, but previously we've used the Haar wavelet transform and there is a lot of convolution involved (for high/low pass filters in video). Are you sure this isnt what you're doing?
 

Hi TrickyDicky,

A,B and C are get the values of the input image and will used to calculate the coefficients. Yes I sure, but I use high/low pass filters in image. Is it same? Thank for reply
 

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