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  1. #1
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    dcimation filter for high order decimation rate

    Hi ALL

    I working on aplication that i need to sample 1.9Khz signal by 1Mhz , its mean 512 OSR - AFTER SIGMA DELTA MODULATION ( FOR SEPARATE the quantization noise from the signal) i need to decimate the signal by decimatin rate of 512.
    i decided to use CIC filter to decimate by 128 and then cascade more 2 FIR - one as compensator and the other for the phase linearization.

    the DC gain in the CIC is a function of the DECIMATION RATE AND THE STAGES so i getting about 100 db in the dc...

    i need to create compensation filter to compensate the very large GAIN that i getting in DC ( about 100db).
    to get flatness passband i need to use inverse sinc fir compensator that attenuate by 100 db in the DC...

    does some one have another solution to this problem ?
    does some one have expirience with the inverse sinc filter?

    THANK U ALL

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  2. #2
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    Re: dcimation filter for high order decimation rate

    I don't understand about a CIC DC gain problem. A CIC decimator with power of two decimation factor is usually designed to have unity gain for the most significant bit and a bit width according to the application requirements. It doesn't make sense to refer gain to the output LSB, I think.

    Frequency compensation with a FIR is reasonable however and can be found in most oversampling ADC chips.



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