Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

if statement alternate needed.

Status
Not open for further replies.
I'm sorry but now you can see that.
The 2nd one also works exactly as prioritized.
I don't see the issue you said "if c<=122, there is no need to compare, but.... "

Actually, they are identical line by line and even addresses are the same. Are you sure you didn't paste the assemble code from the 1st one for the 2nd ?
 
Last edited:
To give other users a chance to check listings like this, you should post mixed code listings (source and assembly). The problem is however, that the result will be changed by applying different levels of code optimization, which aren't obvious by just showing some snippets.

In addition, I notice, that the disassembly block has been silently changed twice since I posted my comment, which is void now. I realize, that the discussion is pointless, without defining exact test conditions. I stop commenting code details at this point, the results have shown so far, that coding styles are relative and can be pretty compensated by the tool.
 
To give other users a chance to check listings like this, you should post mixed code listings (source and assembly). The problem is however, that the result will be changed by applying different levels of code optimization, which aren't obvious by just showing some snippets.

In addition, I notice, that the disassembly block has been silently changed twice since I posted my comment, which is void now. I realize, that the discussion is pointless, without defining exact test conditions. I stop commenting code details at this point, the results have shown so far, that coding styles are relative and can be pretty compensated by the tool.

I'm sorry when I up dated the disassembly to make it more detailed, I placed the same code twice in two cases but now it is correct. but the responses of the dis assembly will not make deference expect #21 response give by lostinxlation.
 

thanks for all to giving me .
but with my huge experiments with all your tips I concluded that

the bigdogguru tip
Yes. The condition of the if statement is evaluated from left to right, evaluation ends upon the first false condition in each of the logical && subconditions and then begins evaluation of the next subcondition in the same.
is the best one. yes it holds good for gcc compiler. it helped me very much. again thank you for all.the next subcondition in the same. [/QUOTE]
is the best one. yes it holds good for gcc compiler. it helped me very much. again thank you for all.
 
Last edited by a moderator:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top