zia.newversion
Member level 5
I was reading a book on PIC microcontrollers. I was particularly interested in some material on timers. I read about clock cycles, instruction cycles, prescalars, timer registers, timer interrupt etc...
The topic of timer-interrupts is what I really wanted to know more about. I know a little bit about hardware interrupts, but this is the first time I am reading about timer interrupts.
I gained a lot from the book. But I have a little confusion. Here is an example scenario:
So, I don't think it should get that complicated. I might be missing something. There must be a workaround. And above all, that "feels" like a non-professional programming approach.
If someone has worked with timers before, could he please help me find a solution?
The topic of timer-interrupts is what I really wanted to know more about. I know a little bit about hardware interrupts, but this is the first time I am reading about timer interrupts.
I gained a lot from the book. But I have a little confusion. Here is an example scenario:
I have a 4MHz system clock (external LP quartz oscillator). I need to increment a certain register every 1ms. 8MHz means 0.125µs per clock cycle and 0.5µs per instruction cycle. By setting 1:8 prescalar, the timer increments every 4µs. After the first 256 increments, timer interrupt is generated. So in this case, after every 1.024ms, interrupt is generated. That's somewhat accurate. But say I cannot afford this error. That would mean I need exactly 250 increments to capture the interrupt with accuracy. So if I start with value 6 stored in TMR0, I would capture the interrupt just in time.
That is good for the first 1ms. Now, the ISR for that timer interrupt might have upto 100 instructions. That would take 50µs. How would I do the next 1ms? I could take those 50µs into account, save 19 in TMR0 (0.5µs) do 3 NOPs (1.5µs) and then wait for next interrupt which will be
----- (256-19)x4µs = 948µs -----
later... So that makes my 948+1.5+0.5+50=1000µs.
Well, that certainly is a lot of calculation. And a lot of calculation if the number of instructions in ISR is other than 100.
And what if the number of instructions is conditional? Shall I do those calculations for every possible path?
For all that depends, ISR could have a single to thousands of instructions!
That is good for the first 1ms. Now, the ISR for that timer interrupt might have upto 100 instructions. That would take 50µs. How would I do the next 1ms? I could take those 50µs into account, save 19 in TMR0 (0.5µs) do 3 NOPs (1.5µs) and then wait for next interrupt which will be
----- (256-19)x4µs = 948µs -----
later... So that makes my 948+1.5+0.5+50=1000µs.
Well, that certainly is a lot of calculation. And a lot of calculation if the number of instructions in ISR is other than 100.
And what if the number of instructions is conditional? Shall I do those calculations for every possible path?
For all that depends, ISR could have a single to thousands of instructions!
So, I don't think it should get that complicated. I might be missing something. There must be a workaround. And above all, that "feels" like a non-professional programming approach.
If someone has worked with timers before, could he please help me find a solution?