Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Delta Id/Id, CMOS Mismatch Caculation

Status
Not open for further replies.

lqy

Member level 3
Joined
Dec 21, 2001
Messages
67
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
468
For the CMOS Mismatch,
ΔId/Id=(ΔW/L)/(W/L)-ΔVth/(Vgs-Vth)
Could somebody tell me how to derive this formula, thank you very much!:p
 

First, pls write Id=1/2.u.Cox.(W/L).(Vgs-Vth)^2. Then calculate differentiation for a=ΔId/ΔW and b=ΔId/ΔVth individually. Finally, you got: ΔId=a.ΔW+b.ΔVth
 
  • Like
Reactions: lqy

    lqy

    Points: 2
    Helpful Answer Positive Rating
thank you leo_o2, I understand what you tell me.
but from one lecture:
Id1=1/2.u.Cox.(W1/L1).(Vgs-Vth1)^2
Id2=1/2.u.Cox.(W2/L2).(Vgs-Vth2)^2
ΔId=Id1-Id2, Id=(Id1+Id2)/2
Δ(W/L)=(W1/L1)-(W2/L2)
(W/L)=((W1/L1)+(W2/L2))/2
ΔVth=Vth1-Vth2
Vth=(Vth1+Vth2)/2
Substitute, then:
ΔId/Id=(ΔW/L)/(W/L)-2ΔVth/(Vgs-Vth)

I don't know how to get ΔId/Id from the above formulas???????
 

I think the book of Fundamentals of Microelectronics of Rabaey has this formulas.
 

thank you leo_o2, I understand what you tell me.
but from one lecture:
Id1=1/2.u.Cox.(W1/L1).(Vgs-Vth1)^2
Id2=1/2.u.Cox.(W2/L2).(Vgs-Vth2)^2
ΔId=Id1-Id2, Id=(Id1+Id2)/2
Δ(W/L)=(W1/L1)-(W2/L2)
(W/L)=((W1/L1)+(W2/L2))/2
ΔVth=Vth1-Vth2
Vth=(Vth1+Vth2)/2
Substitute, then:
ΔId/Id=(ΔW/L)/(W/L)-2ΔVth/(Vgs-Vth)

I don't know how to get ΔId/Id from the above formulas???????
Hello
Id= 1/2*u*Cox* (W/L)*(Vgs-Vth)^2
let's take derivative
ΔId = 1/2*u*Cox*Δ(W/L)*(Vgs-Vth)^2+1/2*u*Cox*(W/L)*2(Vgs-Vth)*(-ΔVth)
than
ΔId/Id = Δ(W/L) / (W/L) - 2*ΔVth/(Vgs-Vth)
that's your formula:wink:
 
  • Like
Reactions: lqy

    lqy

    Points: 2
    Helpful Answer Positive Rating
Not sure if these 2 Id dependencies can be extracted from each other. Even if both dependencies - area or "Pelgrom", and offset voltage (variation) - are somehow correlated because both depend on similar physical parameter variations over area effects (gate-oxide thickness variations, mobility variations, and depletion, surface-state and threshold-implant charge variations), they are probably - to a good part - just different representations of the same physical reasons which lead to local area mismatch, s. e.g. David M. Binkley "Tradeoffs and Optimization in Analog CMOS Design", chap. 3.11 MISMATCH, p. 233 ff.

The above given equation ΔId/Id = Δ(W/L) / (W/L) - 2*ΔVth/(Vgs-Vth) could only be valid in strong inversion (because of the Id dependency on (Vgs-Vth)²); in moderate and weak inversion (Veff = Vgs-Vth ≈ 0 or ≤ 0) the second term would cancel the area dependency and would lead to an unrealistic result.
 
  • Like
Reactions: lqy

    lqy

    Points: 2
    Helpful Answer Positive Rating
Thank you all for your help. Merry Christmas.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top