omara007
Advanced Member level 4
- Joined
- Jan 6, 2003
- Messages
- 1,237
- Helped
- 50
- Reputation
- 102
- Reaction score
- 16
- Trophy points
- 1,318
- Location
- Cairo/Egypt
- Activity points
- 9,716
Is there any way to turn your VHDL synthesizable code into an emulator to the same system your VHDL describes ?
In other words .. let's say you are designing a microprocessor using VHDL ( or even verilog ) .. and now you are done with your design and simulation .. your simulation gave u correct output for your stimulus .. but you have a real program compiled to your designed microprocessor, how can you make use of your HDL to run that program on it , exactly as if it was a real microprocessor ..
simply converting ur code into emulator ..
Do you guys ahve any idea if this is feasible or not ?
In other words .. let's say you are designing a microprocessor using VHDL ( or even verilog ) .. and now you are done with your design and simulation .. your simulation gave u correct output for your stimulus .. but you have a real program compiled to your designed microprocessor, how can you make use of your HDL to run that program on it , exactly as if it was a real microprocessor ..
simply converting ur code into emulator ..
Do you guys ahve any idea if this is feasible or not ?