Assura LVS Problems about unmatched pins

Bellow is the assura lvs problem ,Is the option missed in the setting file.
Does someone can help me to solve it.
Thank you!
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****** rpposab_ckt(Generic) <vs> rpposab_ckt(Generic)
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Filter Statistics
================= Original Filtered
Cell/Device schematic layout schematic layout

Reduce Statistics
================= Filtered Reduced
Cell/Device schematic layout schematic layout

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****** Both networks are empty. There are pin errors. ******
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=========================================================[rpposab_ckt(Generic)]
====== Unmatched Pins =========================================================
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S ?pos
S ?neg
L ?PLUS
L ?MINUS

=========================================================[rpposab_ckt(Generic)]
====== Summary of Errors ======================================================
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Schematic Layout Error Type
--------- ------ ----------
2 2 Unmatched Pins

I also have the same problem. My technology in umc130nm and I am using Assura for rules check.
I have tried swapping the pins in the schematic (I am considering a simlpe nmos connected to power even though it has no sense but my pmos is said to be unbound...), but nothing changed.
Can anyone help me?