Johnlee0329
Newbie level 4
Hi All,
when I do clock tree tracing with my clock specification, it reports an error about clock tree overlap. In my clock specification, I defined two clocks, one is system clock and the other one is test clock. they are connected by a mux. And I defined one throughpin in system clock, not in test clock. but the log file reports overlap error. it seemed that I must define throughpin in test clock as same as in system clock. this is not my wanted. what I want is that: in system clock,I want the clock tree go through the throughpin which i defined. but in test clock, I want the clock tree ended by the throughpin. Is there anybody know how to do? Thanks a lot.
when I do clock tree tracing with my clock specification, it reports an error about clock tree overlap. In my clock specification, I defined two clocks, one is system clock and the other one is test clock. they are connected by a mux. And I defined one throughpin in system clock, not in test clock. but the log file reports overlap error. it seemed that I must define throughpin in test clock as same as in system clock. this is not my wanted. what I want is that: in system clock,I want the clock tree go through the throughpin which i defined. but in test clock, I want the clock tree ended by the throughpin. Is there anybody know how to do? Thanks a lot.