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  1. #1
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    Dual port RAM design from Single port RAM

    Hi,

    Let's say I only have a single port ram(which has only one address bus and based on Wrt enable and rd enable it drives the data on rd_data_bus or write_data_bus) available in the library.

    How do I make it work like dual port RAM ?

    How can I design the wrapper around that single port ram to make it work like dual port ram ?

    Please let me know

    thanks..

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  2. #2
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    Re: Dual port RAM design from Single port RAM

    The easiest (only?) way is to run the 1p SRAM at 2x system frequency and alternate active ports every other clock cycle. i.e., make a wrapper such that one port is active on the rising edge and one port is active on the falling edge.



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  3. #3
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    Re: Dual port RAM design from Single port RAM

    Quote Originally Posted by shethpurak
    Hi,

    Let's say I only have a single port ram(which has only one address bus and based on Wrt enable and rd enable it drives the data on rd_data_bus or write_data_bus) available in the library.

    How do I make it work like dual port RAM ?

    How can I design the wrapper around that single port ram to make it work like dual port ram ?

    Please let me know

    thanks..

    Hi,
    0. Make a top wrapper of dual port ram.Instantiate the single port ram two times.
    1. Send write data with proper control signal i.e. writeEN,OEN, etc to first ram
    as for write operation.
    2. simlarly use the other instance for read operation.
    3. You can aslo use these two instance for simultaneous read and write opeartion also.
    DPRAM PORT LISTS will be as follows :
    a. I1
    b. I2
    c. O1
    d. O2
    e. wen_1
    f wen_2
    etc



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  4. #4
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    Re: Dual port RAM design from Single port RAM

    Quote Originally Posted by nsingh95
    Hi,
    0. Make a top wrapper of dual port ram.Instantiate the single port ram two times.
    1. Send write data with proper control signal i.e. writeEN,OEN, etc to first ram
    as for write operation.
    2. simlarly use the other instance for read operation.
    3. You can aslo use these two instance for simultaneous read and write opeartion also.
    Wouldn't that just make two single-port RAMs? In a dual-port RAM both ports can access the same data. How do you plan to sync up the data between 1-port instances in your scheme? I guess periodically not use the RAMs and have a state machine sync the data? Which instance's data gets priority? Sorry, this plan doesn't make a lot of sense to me, but I'm very curious.



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