about layout offset of fully differential opamp

in layout of fully differential opamp, an offset often exists. in tt corner, it may be 20uV, but in ss or ff corner, it may be 60uV or -40uV, that is, for different corner, the offset can be different also. The same case for different temperature also.
how to understand this? and how to minimize the layout offset of a fully differential opamp?
besides, for a 2X circuit, vout ( = vout+ - vout-) = 2 * (vin+ - vin-), but if the input vltage is small enough, such as 10mV or less, to reach 10 bit or more resolution, the offset must be less than 10uV. in tt corner, the offset may be less than 10uV, but for other corner (ss, ff, sf, fs), the offset may be 100uV or more, and the offset may be a negative value, how to deal with this problem to reach 10 bit resolution in all corner for a small enough input?
i'm really confused about this probelm, pls help me, thanks all.

If your input transistors' layout is already fully symmetric (common centroid, maybe dummies around), you can decrease their offset only by enlarging them (keeping their W/L ratio; Pelgrom mechanism). An offset voltage in the order of 10 .. 100µV, however, is already very good (low), and I'd guess you won't succeed much better!

I think there's no ≥10bit ADC with such a low input range (10mV) available. Such a low input signal always has to be amplified before submitting it to an ADC. And if the amplifiers' offset is a pb. for your application, you have to use an offset cancellation method.

To further reduce input voltage offset,
we shall need calibration / auto-zero-ing techniques
commonly deployed in > 10bit data convertors.
Please check with papers,
Good luck.

lhlbluesky,

do you talking about

systematic offset

or

statistical offset

For the first an explaination would be that with the corners the effect of asymmetry related to the input change. For the second offset I have no clue why.

if your request is high, perhaps offset cancel should be used. In adc, not only opamp need use this technique, but also comparator does. In high precision adc, digital calibration should exist.