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Cyclic Reduancy Check-LFSR as CRC generator or division

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Mkanimozhi

Mkanimozhi

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Cyclic Reduancy Check

Hi friends,
I need to design the Cyclic Reduancy Check -16 for my project, in some concepts they are using LFSR as CRC geberator , but in some cases they are using division method, i m confused which one to use in my project, plz any one tell me which one is the correct method to generate the CRC,and if possible some reference code also needed.


Thanks and Regards
Kanimohi.M
 

Re: Cyclic Reduancy Check

The CRC division is not numeric. It is polynomial division with Boolean coefficients. The LFSR technique is a direct translation of the polynomial division, using XOR to do the "subtraction".
 

Cyclic Reduancy Check

is this crc is using serial input data or parallel
 

Re: Cyclic Reduancy Check

I m planning to design CRC check for HDLC controller.
 

Re: Cyclic Reduancy Check

i m having one doubt, in CRC we are having two types one is

1.Serial CRC
2. parallel CRC

we are using LFSR to generate the CRC but in serial CRC they are coding the same architecture of LFSR but in the Parallel CRC we not doing like that , why and how to write the code for parallel CRC, what is the difference ? and how we are doing this ?



waiting for soultion

Kanimozhi
 

Re: Cyclic Reduancy Check

Kanimozhi,

There is no short answer how to write the code for parallel CRC and why it's different from serial CRC. There is a lot of research done in that area. I can suggest the following pointers:

[1] OutputLogic : this is the method I'm using

[2] G. Campobello, G Patane, M Russo, “Parallel CRC Realization” : it's a good academic paper on the subject

[3] CRC article on Wikipedia covers some aspects of parallel CRC


Hope that helps
=============================================
Visit OutputLogic - tools that improve productivity
 

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