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using both structural and behavioral statements

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radhika_n5

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I have to write a verilog code combining structural and behavioural statements. But i need to execute these structural code at every clock cycle. Can i write these Strustural statemnets inside the always block???? otherwise hw do i do it?? a quick reply ll be a lot of help...
 

Cud u please explain ur q? a small example is moe helpful 2 understand
 

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