sameem_shabbir
Advanced Member level 4
Hi all
Ihave a problem regarding my project. Plz if anybody can help
I am using XESS XST-3S1000 FPGA board having Spartan3 10000k FPGA
XESS corp. has a programm which takes an image from physical SDRAM and displays it on the VGA monitor. The programm has a provision that you can change the image while VGA GEN is running. (ie an image can be downloaded to RAM without effecting the programm)
Now what i did was that I took the square of all the R(red component values, accumulated it and stored it.(Say in sum_r1)
Then i downloaded another image and again took the square of all R values, accumulated it and stored it.(Say in sum_r2)
Now if i want to show individual values of sum_r1 or 2 it is working fine
I can download image files while programm is still running.
But as soon as i put the divider core in the programm to divide the two nos sum_r1 and sum_r2 It gives error that u cannot download the image into RAM
I dont know why
Is there any problem in PAR or what?
Another warning message which is given is
WARNINGrojectMgmt - "F:/XESS/Programms/vgagenPPVerilog/3S1000/test_vga/TOP.ngc" line 0 duplicate design unit: 'Module|TOP'
Can anybody plz help me in that
Ihave a problem regarding my project. Plz if anybody can help
I am using XESS XST-3S1000 FPGA board having Spartan3 10000k FPGA
XESS corp. has a programm which takes an image from physical SDRAM and displays it on the VGA monitor. The programm has a provision that you can change the image while VGA GEN is running. (ie an image can be downloaded to RAM without effecting the programm)
Now what i did was that I took the square of all the R(red component values, accumulated it and stored it.(Say in sum_r1)
Then i downloaded another image and again took the square of all R values, accumulated it and stored it.(Say in sum_r2)
Now if i want to show individual values of sum_r1 or 2 it is working fine
I can download image files while programm is still running.
But as soon as i put the divider core in the programm to divide the two nos sum_r1 and sum_r2 It gives error that u cannot download the image into RAM
I dont know why
Is there any problem in PAR or what?
Another warning message which is given is
WARNINGrojectMgmt - "F:/XESS/Programms/vgagenPPVerilog/3S1000/test_vga/TOP.ngc" line 0 duplicate design unit: 'Module|TOP'
Can anybody plz help me in that