JohnG300c
Advanced Member level 4
I have noticed that every time I run a SI analysis of my design the I/O technology of the Cyclone II FPGA is set the 5V HC. I have to change to LVC manually in order to run my simulation but the next time i do "Analyze Design" all my manual assignments are gone. Clearly this is irritating and time consuming. Has anyone noticed the same? Will I have to somehow modify the IBIS file supplied by Altera to specify that LVCMOS I/O should be used?
I'm a bit of a novice when it comes to AD and IBIS so any pointers in the right direction are appreciated.
I'm a bit of a novice when it comes to AD and IBIS so any pointers in the right direction are appreciated.