Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Connecting CPLD to optical switch

Status
Not open for further replies.

sul

Newbie level 5
Joined
Sep 28, 2003
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
87
Hi All,
I need to connect an SN 1 to 1 optical latching switch to a CPLD.

The switch is JDS uniphase SN series switch and Cypress delta 39K series CPLD

Any help will be highly appreciated.

-Sul
 

I think CPLD can only interface with a digital signal. Is the switch controlled by digital signal?
 

Thanks for the reply,

Yes, this is a digital switch.

Can you guide me as to how to inteface then?
 

Hi, sul:

CPLD is a programmable device. It has many IO pins.

If the CPLD will be designed by you, you can link any IO to the switch and design the internal logic to control your switch.

But if the CPLD is designed by others and already programmed, you have to check the designer about each pin's function.

Hope this helps.
 

Thanks so much.

The CPLD will be designed by me. But the problem is of I/O compatibility.

The switch requires 5V 20ms DC pulse to operate while the CPLD supports 3.3V, 2.5V,1.8V, and 1.5V I/O capability.

What are the ways to connect such pins?

-Sul



dll_embed said:
Hi, sul:

CPLD is a programmable device. It has many IO pins.

If the CPLD will be designed by you, you can link any IO to the switch and design the internal logic to control your switch.

But if the CPLD is designed by others and already programmed, you have to check the designer about each pin's function.

Hope this helps.
 

Hi, sul:

I happen to encounter the same problem for my previous project. Mine is a xilinx device. But the solution may apply to your case. When you want to output a 5V level, just tristate your IO pin. Otherwise, output 0.

The other safest way is to use an external level translator IC. (cheap 74 series)

( +5V--
( |
( | R|
( | |
|
3.3V IO----------------
 

I too faced a similar problem with a xilinx FPGA. I used IDT quickswitch devices.
Check \hxxp://www.idt.com/products/pages/Bus_Switches-QS3861.html
 

Thanks it_boy and dll_embed
Even I found some cheap translators from texas instruments

**broken link removed**


it_boy said:
I too faced a similar problem with a xilinx FPGA. I used IDT quickswitch devices.
Check \hxxp://www.idt.com/products/pages/Bus_Switches-QS3861.html
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top