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How Do I predict the size of Chip from Schematic circuit?

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020170

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When I completed some circuit, I wonder How much area does this chip occupy.

If I have only schematic circuit, Do I have to count the number of TRs in the circuit?

In my thought, The way of Counting the number of TRs is not smart way.

Is there anyone who knows other way to find Chip Area?

thanks
 

Re: How Do I predict the size of Chip from Schematic circuit

020170 said:
When I completed some circuit, I wonder How much area does this chip occupy.

If I have only schematic circuit, Do I have to count the number of TRs in the circuit?

In my thought, The way of Counting the number of TRs is not smart way.

Is there anyone who knows other way to find Chip Area?

thanks

I use the following steps:
first, I will compute the area of the passive devices.

then I will predict the area of the opamp. the layou-xl can be used to predict it.

total number of these will occur 80% area of the whole chip.

In my thought, This way is not a smart way too.
 

    020170

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Re: How Do I predict the size of Chip from Schematic circuit

renwl said:
020170 said:
When I completed some circuit, I wonder How much area does this chip occupy.

If I have only schematic circuit, Do I have to count the number of TRs in the circuit?

In my thought, The way of Counting the number of TRs is not smart way.

Is there anyone who knows other way to find Chip Area?

thanks

I use the following steps:
first, I will compute the area of the passive devices.

then I will predict the area of the opamp. the layou-xl can be used to predict it.

total number of these will occur 80% area of the whole chip.

In my thought, This way is not a smart way too.

Thanks for your reply.

In my case, I have no passive device because I designed SRAM circuit ^^

I wish there is some program to calculate Chip Area in the somewhere.

but Just wish. maybe I'll have to follow your step.

Thanks!
 

just do some schematic driven layout to get an approx estimate of the area.you can add a small no to this to account for interconnect


amarnath
 

sum all W*L, then multiply 2.5

it's a very cursory way
 

Re: How Do I predict the size of Chip from Schematic circuit

There are some script tools which take the netlist and sum up all device related areas. For MOS you typical have some surrounding. Resistors and caps follow similar procedures. Analog wiring is little more tricky; As I know it works in the scripts only for hierachical netlists. The wire area is based on a steiner tree length where the halo of the tree is based on the area of the subcircuit. For irregular circuits it comes close. For other circuits like SRAMs there are bigger differencies.

I have heard that this is ported to skill and shown in composer as annotation. But only roumors.
 

Re: How Do I predict the size of Chip from Schematic circuit

I think paley's way is good.
Additionally, the parameter 2.5 depends on the process. I will multiply 3.
 

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