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polygate contact why we cannot put in the middle of polygate

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janial

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Hi guys,

We usually put gate contact at edge of the polygate. Can anyone explain what is the reason why we cannot put contact in the middle of the poly?

thanks in advance!

- janial
 

Gate poly minimum L is certainly less than minimum of
(contact + 2*overlap). So it's not something that is a
high value option for digital. It would only be practical
for long channel analog stuff.

Then comes the question of what happens to the gate.
Strain effects, VT shifts from contact introducing some
metals into the electrode, reliability degradation, etc.

Somebody would have to do some work to look for,
quantify, model and worst-case the effect of doing this
abnormal thing.

Basically the foundry didn't see fit to qualify the special
case, so they say you can't do it.
 

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Contact over thin oxide is prone to locally change the gate length and so the electrical properties of the MOSFET, hence is generally not allowed.
 

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janial said:
Hi guys,

We usually put gate contact at edge of the polygate. Can anyone explain what is the reason why we cannot put contact in the middle of the poly?

thanks in advance!

- janial
Click to expand...

there are RF processes where contact on gate is tolerated, it has an impact on yield (as others already noted) but it has advantages (reduced gate access resistance) that make up for the drawbacks
 

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Very often, gate contact over active is prohibited by design rules (for reasons mentioned by erikl and dick_freebird).

However, in some technologies, gate contact over active is allowed, for space saving considerations, for example - in image sensors:

**broken link removed**
 

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thanks guys! this helps me a lot
 

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