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RAM with diode-transistor logic?

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Artlav

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Greetings.

Short question: How to make a static RAM cell based on diode-transistor logic?

Full problem:
I'm making a kind-of-a-calculator out of the basic elements, using DTL logic gates, and i want it to have several (8 bit-)memory cells, for both reading and writing.
So far the closest thing i found was 6T SRAM cell, but the only designs i could find was using CMOS transistors.
I'm not good enough at this to design a cell out of latches yet.

So, full question is - what kind of RAM memory cell can be made using diodes and NPN transistors, and how to make it?
 

You would have to set the Wayback Machine to about 1970 to find
people making bipolar SRAMs and talking about it. Cross-coupled NPN
pair, resistor load. The read & write circuitry is the interesting bit. I
bet if you went and dug through old IEEE "red rag" issues from that
period you could find information. TI and National databooks from the
day used to publish fair schematic detail, back when they had a lot
fewer lawyers.

Nobody was using DTL anymore when I got into this business. Why you
want to, I can't imagine. You can get CMOS or TTL latches and registers
and flip-flops for dirt cheap. In tinier packages than DTL will be, surely.
 
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    Artlav

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dug through old IEEE "red rag" issues from that period
Thank you, going through older books did help a bit.
First, from rough schematics i found, i was able to put together a memory cell as a sequential circuit:
sram.png


While sufficient, it's too big for comfort if done naive - that's about 8cm^2 per 1 bit.

As far as i understand, only the 4 NANDs are to be replicated in a grid.
2 of these are a latch, which is less than full 2 NANDs of DTL, but other two are full NANDs, and not simplifyable.

Another thing i found (called "bipolar SRAM cell") is this:
sram_wtf.jpg

A latch with some control stuff around it using "multi-emitter transistors". Does not make much sense to me, looks like something for an IC.
Is that one equivalent to three transistors with bases and collectors linked?
Then, where do inputs go from?


All in all, i'll keep thinking and digging, and ideas are still welcome.


Nobody was using DTL anymore when I got into this business. Why you
want to, I can't imagine. You can get CMOS or TTL latches and registers
and flip-flops for dirt cheap. In tinier packages than DTL will be, surely.
Sure. Then, why use the gate chips if you can buy ALU and control chips for dirt cheap, why use these if you can buy microcontrollers and memory chips as well, or why use parts when you can buy microprocessors and all the peripherals, finally, why not just buy a computer! :)

I wanted to get an idea how things work on the low level.
RTL don't stack well, DTL have an extra diode, TTL saves you the diode but needs bulkier transistors, and CMOS is weird.
 

I think i solved it.

Here is what i got in the end:
sram_succ.png

I guess i'll have to add something for reading selection too, but that's good enough.

If you see any stupid mistakes in that, please don't stay quiet.
 

I think i solved it.

Here is what i got in the end:
sram_succ.png

I guess i'll have to add something for reading selection too, but that's good enough.

If you see any stupid mistakes in that, please don't stay quiet.

Have you managed to build this successfully? please let us know
 

I am not really sore how your circuit works. Is it +5v on logic one, the image is not clear?
I have designed a dtl flip flop on the top left corner of this image http://neazoi.com/transistorizedcpu/inputoutput.png which uses 6 transistors plus 2 for enable on each cell.
Your 5 transistors one, could save some transistors in a big circuit, so it would be nice if you could describe the operation of the cell or give us a link with the description.
 
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