Si & metal gate - performance differences

Hi!
We know that initially first CMOS/NMOS ICs had metal gate (Al?), but then huge performance increase was achieved by switching to Si gate due to decreased capacity.

In the recent years industry switched back to metal gate.

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Could you please help me understand why there was such an performance increase when switching to Si gate, and why it's capacitance less? Only due to it's self-alignment, so that there is less overlap?

And now we get performance boost with metal gates because RC delay is the main issue (and metal has less resistance), while alignment isn't?

With metal gate you have a single work function and
have to tune the body to get VT. With poly gates the
doping could be (but was not necessarily) another
degree of freedom; I saw in-situ-doped and S/D-doped
processes.

But the real benefit of poly gates was the self-aligned
MOSFET where poly defines the channel sharply. All of
our old metal-gate processes were diffusion-defined
(most predated ion implantation, even). Because the
gate is down before junction drive, it would have to
be a refractory metal and one that plays nice with
spacer oxides (how do you grow a spacer on metal,
would you want a deposited oxide up against the
channel?) and so on.

The capacitance comes not from the gate species,
but the fact that a non-self-aligned gate needs a
built in overlap of diffusions to ensure that the
channel hooks up. Self-aligned cuts that to near
zero (just the implant lateral drive distance).

Another (maybe the main) advantage of metal gate over doped polysilicon gate is the absence of depletion in the gate area adjacent to gate oxide.

Due to a finite doping level of polysilicon, this depletion in the on-state leads to increase in effective gate oxide thickness and to decreased transconductance. The amount of depletion is a few angstroms - which is significant as compared versus modern gate oxide thicknesses (~10A).