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what does this VHDL notation mean?

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frznchckn

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My colleague and I are trying to decipher some vendor code and we've just not familiar with some of this notation:

Code:
constant MY_CONSTANT : std_logic_vector(4 downto 0) := std_logic_vector(to_unsigned(16#0#, 5));

What is the second # sign for here? I've found

**broken link removed**

concerning a "base literal". Could someone maybe further explain the base_literal notation?

based_literal ::= base # based_integer [ . based_integer ] # [ exponent ]

Thanks.
 

Apparently, 16 is base and 0 is based_integer. Fraction and exponent are omitted, as this grammatic allows.
 
Would the exponent be to the base? So for this example:

16^exponent since 16 is the base?
 

I'm not sure, but my guess is what you call base is 0, and 16 is radix (i.e. hex).
Correction: I meant it's 0h * 16 ^ exp. I might be wrong, though.
 
Last edited:

its most useful being able to represent integers as hex numbers!
 

a true WTF is that they needed to represent the value 'zero' in hex rather than decimal. (Unless this was just one row in a bunch, and all the other rows actually made sense to be hex: 16#4#, 16#8#, 16#C#, 16#F#, etc.)
 

its most useful being able to represent integers as hex numbers!

Yes, but it is bad that the maximum number is 16#7fffffff#

If we have the following unsigned signals:

signal foo : unsigned(30 downto 0);
signal bar : unsigned(31 downto 0);
signal xyz : unsigned(32 downto 0);
signal dummy : unsigned(35 downto 0); -- needed?

How can I assign them an arbitrary values in hex?

foo <= to_unsigned(16#40000000#, foo'length);

bar <= X"80000000";

dummy <= X"100000000";
xyz <= dummy(xyz'range);

Is it possible to assign an "odd" number of bits (>32) in hex without a dummy signal?
I tried with resize, but I could not give it a correct first argument.
 

if you want more than 32 bits you need to either build it up:

c <= to_unsigned(16#7FFFFFFFF#, 32) & to_unsigned(16#01234567#, 32);
or just directly assign it:

c <= x"7FFFFFFF01234567";
 
if you want more than 32 bits you need to either build it up:

c <= to_unsigned(16#7FFFFFFFF#, 32) & to_unsigned(16#01234567#, 32);
or just directly assign it:

c <= x"7FFFFFFF01234567";

Using "&" should work, but I think each "to_unsigned" can only define 31 bits, not 32. Additional bits will be zero.

The problem with direct assignment using X"....." is that it only works if the number of bits on the left side is a multiple of 4.

At least I now have one solution for assigning "xyz" in my example, without a dummy signal:

signal xyz : unsigned(32 downto 0);

xyz <= to_unsigned(16#10000#, 17) & to_unsigned(16#0000#, 16);

It looks ugly, but it works. Thank you!
 

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