How to insert a hierarchy in RTL design

woshicloud · Nov 17, 2010

can any tool do following operation on RTL code?

from:
module A();
A1 A1();
A2 A2();
endmodule

to

merge A1 A2 into a new module A12)
module A();
A12 A12();
endmodule

module A12();
A1 A1();
A2 A2();
endmodule

Thanks

jpvSoccer · Nov 17, 2010

Hi, how about:

dc_shell: group {A1, A2} -design_name A12

woshicloud · Nov 27, 2010

my target is to insert a hierarchy into an RTL design, not netlist. Can dc_shell do such operation?

jpvSoccer · Nov 27, 2010

Hi, have you looked into VerilogMode EMACS? While not perfect, it could probably automate some of the tasks.