Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Solar Inverter design

Status
Not open for further replies.

vimalkhanna

Full Member level 6
Joined
Aug 7, 2010
Messages
322
Helped
55
Reputation
110
Reaction score
53
Trophy points
1,308
Location
delhi
Activity points
3,224
I need to design a 10KVA /50Hz inverter with >95% efficiency and HF operation at 33KHz or higher .I have N87 ferrites for use. .
The design needs to use IGBTs for output pulse switching and input supply of 350VDC from the solar panels.
Since the output is transformerless ,how do I achieve isolation from the grid ?How do I generate power for home load and changeover to grid ?
Can members guide me to design with PWM processor /software routine /etc for getting max. power conversion. Any help ,schematics ,circuit design ,drivers for IGBTs etc shall be a help.
 

see timnolan - Solar Projects

getting >95% efficiency at 33kHz is doing to be tough. luckily your power is not that high, only 10kVA. not sure why you insist on IGBT, i think you can do what you want with 600V rated MOSFET which might perform better at the higher switching frequency.

you can not get GALVANIC isolation without the transformer.. you can put an inductor-cap-inductor on the AC side of your inverter as a filter .. which sorta acts like a method of isolation when the power is ON.

of course, you can also use a contactor to open the connection to acheive true isolation which works great when you have no desire to transmit any power. ;)

Mr.Cool
 
I raised the switching frequency to 65KHz and then further to 120-130Khz to increase my efficiency .
The ferrites used now are N97 //P3 grade which improve the heating losses to higher mU .The Mosfets are inverter grade version to give a higher transition.
However , statics in Mosfet give a burnout which is damped by snubbers .
Ringing in the di/dt mode gives complexity to the whole power switch modes.
I tried bridge configration with leakage inductances to protect afgainst the third quadrant flashes ,,but the loss mounted .
Presently , I am stuck ,looking for an expert aid .
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top