About the effect of rpplus resistor bulk floating

resistor floating bulk

Hi, I am working in a bandgap reference voltage circuit design.
As the large area needed for the resistor of it, I chose the rpplus (P+ diffused resistor w/o salicide) as the resistor in the bandgap. As the two resistors of this circuit with large values, one is 54K and the other is 640K, the rphpoly resistor will cost a large area but more accurate.
But I met a problem in DC simulation with the rpplus resistor, the cirtuit could not get convergence which result in a wrong result when the three terminals of the rpplus were all connected (the bulk terminal connected to VDD, the bulk of rpplus is NWELL) in some parameters setting but some not.
But when I float the bulk terminal of it (float the NWELL), the circuit works well, and could get a good result without any convergence error.
The cirtuit is correct and the convergence error does not come out when I use the rphpoly resistor instead of the rpplus.
I am worried about the effect of the floating NWELL bulk to simulation result and the layout performance.

My process is TSMC 0.18um CMOS
Can anyone give me some advice, please? Can I float the NWELL of rpplus in simulation and layout?

Thank you.
Best regards!

what the effect of the resistors in a circuit

I believe you should follow the design rules more than simulations. Floating the bulk doesn't look good to me.

Maybe you should look into the model files

floating nwell

Hi, strennor
I contacted the Cadence Technical Support Engineer， and they told me I could float the bulk in pre-simulation(and they said it will not do any effect to the simulation because the value of the resistor has nothing to do with bulk voltage), and connect it to VDD in layout(they said in post-simulation this error will disappear in most time). I am trying this method.

Thank you for your reply.
Best regards!

effact of resistor

hello goam and stren,

if floatinn bulk doesnt efect the value of resistor ,y it is required to connect to VDD.....???
is only reasong is noise isolation.....>???? or there is some other reason.?

Re: effact of resistor

deepak242003 said:

hello goam and stren,

if floatinn bulk doesnt efect the value of resistor ,y it is required to connect to VDD.....???
is only reasong is noise isolation.....>???? or there is some other reason.?

Click to expand...

I think it is also to account for parasitic capacitance and resistance between the resistor and substrate for post layout simulation

What about having a floating-base BJT in the heart of
your bandgap seems like a good idea to you?

At best you will have a memory effect and an uncontrolled
/ {temp-, supply-, noise-varying leakage into that resistor.

Memory type effects drive binary-search numerical solution
crazy because there are at least two valid states.