Decoupling capacitor value calculation and requirement

decoupling capacitor

Dear Friends


Can any one help me how to calculate decoupling capacitor values and what is the main purpose of the these .
and also help me

if any notes or material is available how to check time varience for interfacing two devices.


Regards
Suresh

decoupling capacitor value

The value of the decoupling capacitor is hardly ever calculated. In general, check the datasheet for the IC and follow any specific recommendations they have. Large ICs, like FPGAs, will always have a recommended decoupling scheme. Often for large ICs, it is several capacitors in parallel with the values distributed over a couple decades of capacitance.

If specific info is not given there, then using a value between 0.1uF and 0.33uF is common. General rule is one decoupling capacitor per power pin of the IC. Small ICs that are closely placed on a PCB board can often share an decoupling capacitor.
The exact value is often a function of what capacitors a company is stocking, the price and what capacitors are used elsewhere on the board.

For example, if one IC datasheet specifically states that 0.22uF decoupling is required, then all ICs in the design that uses this IC may get 0.22uF decoupling. This is an economy of scale issue. It is cheaper to buy in higher volume. It is also faster to build with fewer different values of components.

When buying capacitors, the dielectric is important especially if the temperature range varies in use. Generally, X7R is a good dielectric. There are others that may be cheaper, but they lose capacitance as the temperature increases.

Finally, layout is very important. A decoupling capacitor that is attached to the IC with long thin traces is not much good. The trace inductance greatly weakens the effect of the capacitor. Best connection method is what we call "PIN-PIN-VIA" Pin of the IC connected to the Pin of the decoupling capacitor and then connected to the via to the plane. This applies to both the power and ground connections of the decoupling capacitor. While best connection method is the goal, it cannot always be achieved. Often this connection is "PIN-VIA PIN-VIA" Pin of the IC connected to a via to the power plane and Pin of the decoupling capacitor connected to the via to a power plane. In both cases, the decoupling capacitor has to be physically close to the IC.