About PLL phase-noise and tran simulation with spectre

gaom9 · Feb 15, 2009

simulation update too large

Hi,
I am designing a sigma-delta pll, and want to do the phase-noise simulation with spectre PSS and PNOISE. But there are some questions about it, and can anyone help to solve them, please.

1. when I use a OSC verilog-A code as the input reference frequency source, the PSS simulation will be failed because of the hidden-state in the verilog-A code. Is there any way to solve it please?

2, when I use a vpulse as the input reference frequency source, the PSS simulation failed again, the error report is shown as follow:

Error found by spectre during periodic steady state analysis `pss'.
`V0' is a periodic input signal, which is inconsistent with autonomous circuits.

How can I solve this problem, please? Is there any setting should I make?

3, when I do the tran simulation of the PLL, there are some error come out as shown follow:

Error found by spectre at time = 25.9551 us during transient analysis `tran'.
No convergence with minimum time step. Last acceptable solution computed at 25.9551 us.

The values for those nodes that did not converge on the last Newton iteration are given below. Also given is the manner in which the convergence criteria were not satisfied in the following form:
Failed test: | Value | > RelTol*Ref + AbsTol

V(I17.I162.I15.M14.bi) = 342.545 uV, previously 342.545 uV.
update too large: | 1.34297 uV | > 342.545 nV + 1 uV
V(I17.I162.I15.M14.db) = 272.377 uV, previously 272.377 uV.
update too large: | 1.47118 uV | > 272.377 nV + 1 uV
V(I17.I162.I15.M14.sb) = 310.535 uV, previously 310.535 uV.
update too large: | 1.34146 uV | > 310.535 nV + 1 uV

How can I solve these problem, please?

Thank you!
Best regards!

erikl · Feb 15, 2009

spectre pll simulation

gaom9 said:
1. when I use a OSC verilog-A code as the input reference frequency source, the PSS simulation will be failed because of the hidden-state in the verilog-A code. Is there any way to solve it please?

I guess your item #1 question is related to your #2 pb. Pls. s. below!

gaom9 said:
2, when I use a vpulse as the input reference frequency source, the PSS simulation failed again, the error report is shown as follow:

Error found by spectre during periodic steady state analysis `pss'.
`V0' is a periodic input signal, which is inconsistent with autonomous circuits.

How can I solve this problem, please? Is there any setting should I make?

See these discussions:
**broken link removed**

... and this Cadence workshop tutorial from
$cds_mmsim_dir/tools/spectre/examples/SpectreRF_workshop/rfworkshop/rfworkshop_vco_instruction.pdf
(s. below).

gaom9 said:
3, when I do the tran simulation of the PLL, there are some error come out as shown follow:

Error found by spectre at time = 25.9551 us during transient analysis `tran'.
No convergence with minimum time step. Last acceptable solution computed at 25.9551 us.

The values for those nodes that did not converge on the last Newton iteration are given below. Also given is the manner in which the convergence criteria were not satisfied in the following form:
Failed test: | Value | > RelTol*Ref + AbsTol

V(I17.I162.I15.M14.bi) = 342.545 uV, previously 342.545 uV.
update too large: | 1.34297 uV | > 342.545 nV + 1 uV
V(I17.I162.I15.M14.db) = 272.377 uV, previously 272.377 uV.
update too large: | 1.47118 uV | > 272.377 nV + 1 uV
V(I17.I162.I15.M14.sb) = 310.535 uV, previously 310.535 uV.
update too large: | 1.34146 uV | > 310.535 nV + 1 uV

How can I solve these problem, please?

See $CDS_INST_DIR/doc/spectreRF/spectreRF.pdf pp. 1196 ff & p. 1206

HTH! erikl
____
BTW: You'd better post such questions in the "Analog IC Design & Layout" forum, IMHO.

gaom9 · Feb 17, 2009

pmos2v

Thank you for your reply, erikl.
The problems above have be solved, but another problem come out when I do the AMS simulation in spectre.
The error report is:
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.pmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M3' of the unit 'pmos2v' is unresolved in 'Chargepump.CP:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.pmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M4' of the unit 'pmos2v' is unresolved in 'Chargepump.CP:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.pmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M2' of the unit 'pmos2v' is unresolved in 'Chargepump.CP:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.nmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M1' of the unit 'nmos2v' is unresolved in 'Chargepump.CP:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.nmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M9' of the unit 'nmos2v' is unresolved in 'Chargepump.CP:schematic'.

The tsmc18rf PDK is normal, and the symbol view exists. The AMS simulation failed but the spectreverilog simulation mode is successful, the setting of the AMS simulation is normal, and I have tried many different setting, but they failed again.

Why?

Thank you!
Best regards!

erikl · Feb 17, 2009

pll schematic symbol

gaom9 said:
Thank you for your reply, erikl.
The problems above have be solved, but another problem come out when I do the AMS simulation in spectre.
The error report is:
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.pmos2v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M3' of the unit 'pmos2v' is unresolved in 'Chargepump.CP:schematic'.
...
ncelab: *E,CUCFUN: instance 'M1' of the unit 'nmos2v' is unresolved in 'Chargepump.CP:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc18rf.nmos2v:symbol in the design libraries.

The tsmc18rf PDK is normal, and the symbol view exists. The AMS simulation failed but the spectreverilog simulation mode is successful, the setting of the AMS simulation is normal, and I have tried many different setting, but they failed again.

Why?

Seems the netlister cannot find the spice models for the primitives 'pmos2v' & 'nmos2v'. Check your include files! Are the paths correct both for the spectre symbols and the spice models?

gaom9 · Feb 17, 2009

phasen noise spectre cadence example

Hi, erikl
The spice model paths is correct, and the spectre symbols exists.

Here is the same problem with me.

erikl · Feb 17, 2009

spectre example

gaom9 said:
Hi, erikl
The spice model paths is correct, and the spectre symbols exists.

Hi gaom9,
... and the path to the symbols is correct, too?
If so, I'm at the end of my wisdom: I don't have the tsmc18rf PDK, so I can't help any more, sorry :-(
Hope you may get help from
erikl

gaom9 · Feb 18, 2009

spectre minimum time step used

Hi, erikl
The path to the symbols is correct, and I have tried to change the simulation view to spectre, but the error is still. I tried the way in , but it did not work.

Thank you for your help.
Best regards!

gaom9 · Feb 18, 2009

spectre analysis pll

Hi, erikl
I have found the way to solve this problem.
Because the AMS simulation is different from spectre, so we must use the CIW-Conversion Tool Box-AMS simInfo form Spectre to creat the simulation information of the PDK.
After doing that, the simulation can run right.

Best regards!

erikl · Feb 18, 2009

periodic steady state analysis pll

Thank you, gaom9,
for your response with the solution! May be I'll need it, once upon a time. And anyway: presenting a solution at the end of a forum discussion may help a lot of people.

Best regards, and good luck!
erikl

jas2005 · Apr 26, 2009

periodic steady state pll spectre

Hi gaom9

How did you solve your 1st problem:

1. when I use a OSC verilog-A code as the input reference frequency source, the PSS simulation will be failed because of the hidden-state in the verilog-A code

gaom9 · Apr 29, 2009

spectre pss verilog

Hi, jas2005
You can use the SIN signal of verilog-A code as the reference frequency, because the SIN code is not with any hidden-state, and the PSS simulation will pass.

May it helpful to you.
Best regards!

jas2005 · Apr 29, 2009

+pll +spice +noise

Hi
I'm tring to make the simulation of PLL with two ideal blocks: VCO and Divider (it'll be faster then full system simulation, which I'm going to make at the end when everything will be ready).
I used voltage domain Divider from Cadence example. But during the pss analysis there is an error:
hidden state variabe: tlast_cross.
(the comunicat indicates the line where 'tlast_cross = $realtime;')

Do you know how to change the code to solve the problem?

Code:

`include "constants.h"
`include "discipline.h"

`define TIME_TOL 10e-12
`define VOLT_TOL 1e-6
`define TWO_PI 6.2831853071795864769

module frequency_divider(output_osc_sig, divide_ratio, input_osc_sig);
output output_osc_sig;
electrical output_osc_sig;
input divide_ratio;
electrical divide_ratio;
input input_osc_sig;
electrical input_osc_sig;

parameter real amplitude = 5;

real tlast_cross;
real fout;
real theta;
real divide_r;

analog begin
   @(cross (V(input_osc_sig),0, `TIME_TOL, `VOLT_TOL)) begin
      fout = 0.5/($realtime-tlast_cross);
      tlast_cross = $realtime;
   end
   if (V(divide_ratio) >= 0.001)
      divide_r = V(divide_ratio);
   else begin
      divide_r = 0.001;
      $display("Serious Warning: The divide ratio went below .001!!\n");
      $display("Serious Warning: I've arbitrarily divided by .001 instead!!\n");
      $display("\n");
   end
   theta = idt(fout/divide_r,0);
   bound_step(0.05*divide_r/(fout+1));
   V(output_osc_sig) <+ -amplitude*sin(`TWO_PI*theta);
end
endmodule

Thanks in advance for help

xwlpxc · May 7, 2009

hspice verilog a simulation hangs

2 Error found by spectre during periodic steady state analysis `pss'.
`V0' is a periodic input signal, which is inconsistent with autonomous circuits.
How can I solve this problem, please? Is there any setting should I make?
-----------------------------
hi gaom9
I meet this problem in another simulation.
I designed a LC-VCO system(a typical autonmous system). And I want to know some noise's impact to vco.
So I series vdd(1.8V) with a sine soure(100mv 10MHz).
But pss/pnoise have error.
The error is :`V0' is a periodic input signal, which is inconsistent with autonomous circuits.
How can I solve this problem,then?
thanks

erikl · May 7, 2009

divider spectre pss simulation

xwlpxc said:
2 Error found by spectre during periodic steady state analysis `pss'.
`V0' is a periodic input signal, which is inconsistent with autonomous circuits.
How can I solve this problem, please? Is there any setting should I make?
-----------------------------
hi gaom9
I meet this problem in another simulation.
I designed a LC-VCO system(a typical autonmous system). And I want to know some noise's impact to vco.
So I series vdd(1.8V) with a sine soure(100mv 10MHz).
But pss/pnoise have error.
The error is :`V0' is a periodic input signal, which is inconsistent with autonomous circuits.
How can I solve this problem,then?
thanks

Suggest you study **broken link removed** discussion, and further discussions noted threrein.

jas2005 · May 8, 2009

spectrerf hidden state problem

Hello
I was performing the pss and pnoise simulation but some problems occured.
Let me describe my system.
I'm making PLL which consists:
Reference voltage (square wave-vpulse): 4MHz
PFD/CP: 3 state, transitor level
Loop Filter: second order (R+C) || C
VCO (sinusoid): 300 MHz (Verilog-A example from Cadence 'pllLib')
Block to change vco sin to square and sent it to Divider.
Divider: N=79 (Verilog-A example from "Hidden State in SpectreRF" by Ken Kundert)

(I have also transistor level divider and VCO which are working but first I wanted to make pnoise simulation with these two ideal Verilog-A models to save the time)

So, the transient simulation shown that PLL locks and the the stabilization time is 10us.
Then I set the following parameters of PSS and Pnoise analysyis:
PSS:
Beat frequency: 4MHz (like desired frequency od out signal of divider)
Nr of harmonics: 7
Accuracy Defaults: moderate
Additional time for stabilization: 10us
(rest of parameters is default. The 'Oscillator' option is not checked)

Pnoise:
Sweeptype: Relative
Relative frequency: 1
Start-Stop: 100 - 20M
Sweep Type: Logarithmic
Points per decade: 5
Maximum Sideband: 7
Output -> voltage; positive node: VCO output; negative node: VSS
Input Source-> voltage; Input voltage source: my reference source - vpulse
Reference side-band: 0
Noise Type: source

First of all I'm not sure if I set correctly the pnoise parameters (especially these ones below Maximum Sideband).

Ok, when I run the pss simulation it was working until 10us. Then there was a comunicat like simulating from 10us->10.25us; simulation was working a little until 10.24us and then hung-up. Nothing more happend so I had too stop the simulation.

So my questions are:
Are the pss and pnoise settings correct?
Why the pss simulation cannot be finished?

Thanks in advance for replies.

saro_k_82 · May 11, 2009

ads plllib

Try using a swap file for pss. Sometimes for long pss sims, the raw file becomes huge and the sim just hangs. Provide some file name in the swp file column.

jas2005 · May 13, 2009

pss simulation sin wave autonomous

Hello

Actually I overlooked one thing. I said that pss analysis hung-up, but I noticed that the convNorm was quite big like 27.2e+03. So I checked again. In fact the analysis were making loops and after long time just sttoped. So there is a problem with convergence.

But in transient analysis the ripples of VCO control voltage, after 10us, were like 1mV which means 100kHz variation of VCO frequency (Kvco=100MHz/V). So there shouldn't be any problem.

I thing that my settings are wrong.
Could anybody answer, are the pss settings correct?

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