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How to define the gain margin of 3rd order PLL?

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Re: gain margin of PLL

I doubt if the diagram shows really the loop gain of your linear PLL model of third order. The phase response should start at 90 deg due to the VCO integrating function.
Please give some more information.
 

Re: gain margin of PLL

needforspeed said:
hi all,
how can we define gain margin of a 3 order PLL.
Click to expand...

What is the gain margin?
Why we care the gain margin?
Thanks.

Added after 4 minutes:

LvW said:
I doubt if the diagram shows really the loop gain of your linear PLL model of third order. The phase response should start at 90 deg due to the VCO integrating function.
Please give some more information.
Click to expand...

I think it is the open loop response of PLL.
 

Re: gain margin of PLL

LvW said:
I doubt if the diagram shows really the loop gain of your linear PLL model of third order. The phase response should start at 90 deg due to the VCO integrating function.
Please give some more information.
Click to expand...

It's a type two PLL. Since the VCO contributes a pole at the origin and loop filter introduces the other one, phase curve approximates minus 180 degree.

Added after 25 minutes:

jecyhale said:
needforspeed said:
hi all,
how can we define gain margin of a 3 order PLL.
Click to expand...

What is the gain margin?
Why we care the gain margin?
Thanks.

Added after 4 minutes:

LvW said:
I doubt if the diagram shows really the loop gain of your linear PLL model of third order. The phase response should start at 90 deg due to the VCO integrating function.
Please give some more information.
Click to expand...

I think it is the open loop response of PLL.
Click to expand...

1. basically, gain margin is the difference between unity and the loop gain whose frequency is the one when loop gain phase is -180degree. as for details, you can find it in "mo ni dian zi ji shu ji chu" of Tong shibai. (you might know this book if you are a chinese)
2. in my opinion, to stabilize the feedback system, we should let gain less than 0dB when loop gain phase reach minus 180degree. however, in a type two PLL, loop gain is very large at the origin where loop gain phase approximate minus 180degree.
 

Re: gain margin of PLL

needforspeed said:
It's a type two PLL. Since the VCO contributes a pole at the origin and loop filter introduces the other one, phase curve approximates minus 180 degree.
Click to expand...

Yes - 180 deg for very high frequencies. But what about low frequencies ?
Does your phase response aproaches 90 deg ? (Cannot be seen in the diagram).

Gain margin: As your PLL is of second order, it makes no sense resp. it is even not possible to give a gain margin, since the phase never reaches 180 deg.
 

Re: gain margin of PLL

LvW said:
needforspeed said:
It's a type two PLL. Since the VCO contributes a pole at the origin and loop filter introduces the other one, phase curve approximates minus 180 degree.
Click to expand...

Yes - 180 deg for very high frequencies. But what about low frequencies ?
Does your phase response aproaches 90 deg ? (Cannot be seen in the diagram).

Gain margin: As your PLL is of second order, it makes no sense resp. it is even not possible to give a gain margin, since the phase never reaches 180 deg.
Click to expand...

as shown in fig, phase response aproaches -180deg at low frequency. That is different from conventional control system.
i am confused.
 

Re: gain margin of PLL

needforspeed said:
LvW said:
needforspeed said:
It's a type two PLL. Since the VCO contributes a pole at the origin and loop filter introduces the other one, phase curve approximates minus 180 degree.
Click to expand...

Yes - 180 deg for very high frequencies. But what about low frequencies ?
Does your phase response aproaches 90 deg ? (Cannot be seen in the diagram).

Gain margin: As your PLL is of second order, it makes no sense resp. it is even not possible to give a gain margin, since the phase never reaches 180 deg.
Click to expand...

as shown in fig, phase response aproaches -180deg at low frequency. That is different from conventional control system.
i am confused.
Click to expand...

Don't worry, It should be correct.
But I am confused too.

Added after 2 minutes:

As shown in the figure, it should be the open loop result of PLL.
If it is the close loop result, I am sure the loop gain is below 0dB.
 
Re: gain margin of PLL

Quote:
as shown in fig, phase response aproaches -180deg at low frequency. That is different from conventional control system.
i am confused.

Yes, something is wrong.
Question: Did you model the VCO as an integrator (Kvco/s) ? In this case, the open loop response has no other choice than to approach -90 deg for very low frequencies, as the low pass starts at a somewhat higher frequency.
 

Re: gain margin of PLL

This is 3 order PLL open loop and close loop response
 

Re: gain margin of PLL

Looks good - however, it is really 3rd order ?
I can see a gain slope of only -40dB/dec for high frequencies.
 

Re: gain margin of PLL

jecyhale said:
needforspeed said:
LvW said:
needforspeed said:
It's a type two PLL. Since the VCO contributes a pole at the origin and loop filter introduces the other one, phase curve approximates minus 180 degree.
Click to expand...

Yes - 180 deg for very high frequencies. But what about low frequencies ?
Does your phase response aproaches 90 deg ? (Cannot be seen in the diagram).

Gain margin: As your PLL is of second order, it makes no sense resp. it is even not possible to give a gain margin, since the phase never reaches 180 deg.
Click to expand...

as shown in fig, phase response aproaches -180deg at low frequency. That is different from conventional control system.
i am confused.
Click to expand...


Don't worry, It should be correct.
But I am confused too.

Added after 2 minutes:

As shown in the figure, it should be the open loop result of PLL.
If it is the close loop result, I am sure the loop gain is below 0dB.
Click to expand...

yes, it's a open loop response. something like the definition of phase margin and gain margin is based on open loop gain, namely loop gain.
I think the reponse posted is correct. What I want is getting some explaination according to stability theory which we have in hand.
Thanks your reply. I'm not fighting alone.

Added after 10 minutes:

LvW said:
Quote:
as shown in fig, phase response aproaches -180deg at low frequency. That is different from conventional control system.
i am confused.

Yes, something is wrong.
Question: Did you model the VCO as an integrator (Kvco/s) ? In this case, the open loop response has no other choice than to approach -90 deg for very low frequencies, as the low pass starts at a somewhat higher frequency.
Click to expand...

I modeled the VCO as an integrator (Kvco/s). then loop filter(figure) bring in another pole at the origin. There are two poles at the origin, making phase -180deg at low frequency.
 

Re: gain margin of PLL

Quote:I think the reponse posted is correct. What I want is getting some explaination according to stability theory which we have in hand.
Thanks your reply. I'm not fighting alone.


In your reply at 11:36 you were "confused". And now ?
I think everything is said: The open loop response is not 3rd order and the phase behaviour at low frequencies looks strange as there is no approach to 90 deg.
More than that, you have posted a nice jpg-file showing definition for gain and phase margin. So, what else can say somebody else but you ?

Added after 7 minutes:

Sorry, I was to quick with my answer. I just have seen your addendum (after 10 minutes).
Now the picture becomes more clear. You have two poles at the origin - therefore -180 deg, according to a gain slope of -40dB/dec. OK.
And within the critical range the phase is enhanced because of stability.
From you first diagram I would conclude that the phase margin is app. 50 deg.
So it looks good.
 

gain margin of PLL

I still in confused.
In fact the first posted png is a typical open loop response of a 3 order charge pump pll. and i have tried to explain why the phase response start from -180deg at low frequency.
why do you think it's not a 3 order system?
 

Re: gain margin of PLL

needforspeed said:
I still in confused.
In fact the first posted png is a typical open loop response of a 3 order charge pump pll. and i have tried to explain why the phase response start from -180deg at low frequency.
why do you think it's not a 3 order system?
Click to expand...

Well, in principle a third order system exhibits a maximum gain slope of -60 dB/dec corresponding with a maximum phase deviation of -270 deg. And this cannot be seen in your diagram. However, in many cases the 3rd pole lies outside the normal operating range (and must be there for stability reasons !) and, therefore, the system looks similar to a 2nd order system. I think this is the case for your system.
 
gain margin of PLL

in fact, all the 3 poles fall in range you can see from the first figure. but there is a zero between the later two poles, making the maximum phase shift -180deg.
anyway thanks for your discussion.
 

Re: gain margin of PLL

You are welcome ! Anyway, it was interesting also for me.
 

Re: gain margin of PLL

LvW said:
Looks good - however, it is really 3rd order ?
I can see a gain slope of only -40dB/dec for high frequencies.
Click to expand...

Yes, it is 3rd.

The bandwidth is 100k. and the gain slope is -35 at 16MHz.

But if it is too small, you can use 50k or 10k bandwidth.

but the lock time will be changed too.
 

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