Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

What's the difference between static and dynamic timing analysis?

Status
Not open for further replies.
diemilio

diemilio

Full Member level 6
Joined
Sep 19, 2006
Messages
383
Helped
64
Reputation
126
Reaction score
15
Trophy points
1,298
Location
Framingham, MA
Activity points
3,797
HELLO

Could someone please explain me what's the difference between static and dynamic timming analysis

thanks,

diemilio
 

Re: timming analysis

Hi,
Static timing analysis pertains to calculating path delays without applying any test vectors. The dynamic analysis is related to gate level simulation after inserting delays for each gate this done after synthesis, this needs test vectors to analsys. The path delays varies with applied test vectors. This DTA takes more time compared to STA.
 

    diemilio

    diemilio

    Points: 2
    Helpful Answer Positive Rating
Re: timming analysis

Hi can i know what is skew in digital? What is its effect?

Can anyone give a practical example about this?

thanks in advance!
 

Re: timming analysis

Hi,
skew is related to clock, this term comes when ever there is difference in arrival of clock at the two or more different syquential circuits in the design. This can be eleminated by using clock trees like H-tree or star n/w, the clock skew can also exists in between two different chips (have interdependent operations) which are sharing same clock signal. This can be eliminated using PLL's.

any coments plz free to ask.
 

timming analysis

Generally, static analysis is used to verify setup time violation, hold time violation, recovery and removal time violation, gate-clock timing check. and so on. Dynamic can also check the setup and hold, but it depends on vector stimulus, In my opinion, it is used to check the functional problem more often.
 

Re: timming analysis

diemilio said:
HELLO

Could someone please explain me what's the difference between static and dynamic timming analysis

thanks,

diemilio
Click to expand...

STA - Static Timing Analysis is a formal method to prove the timing correctness and DTA is a Dynamic/Simulation based technique. As of now, STA dominates but DTA is still used, say 95% STA and 5% DTA - but the exact % might vary. STA has the advantage of "completeness" as it is a formal approach, but has some issues such as:

The constraints may be wrong
Can't fully handle async clock domains
etc.

Infact in my company we are exploring STA to DTA linking via Assertions.

We cover this topic in detail in our CFV course, see: www.noveldv.com for more on the course.

HTh
Ajeetha, CVC
www.noveldv.com
 

Re: timming analysis

can anybody just brief me about

how to perform DTA and STA?? with tools/software/process involved..
 

Re: timming analysis

DTA can be performed using VCS,NCSIM,modelsim etc
synopsys Primetime is best for STA
 

timming analysis

in short, STA is by using timing analysis tool to check timing violations, particularly in the stage of synthesis;
DTA (first time to hear :) ) is by postlayout simulation with either simulator, and sdf backannotation, for such purpose, u usually need perform two runs: bestcase and worstcase.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top