issue of multiplier when fpga to asic conversion...

asic multiplier

anybody know how the multiplier will be converted when converted from fpga to asic?
ie. will there be enough multipliers in asic or not?

Hi
ASIC is application specific integraed circuit and u need to design tings there.The way u design the things will be imlemented.There are no inbuilt things as in an FPGA.u have dedicated multipliers.
However all ASIC synthesis tools do have a library in which all multiplier types are present and you need to give directives to get a particular type of arithmetic unit.

ex

module mul(a,b,c);
input a;
input b;
output c;
assign c=a*b;
//ur directives go here like directive ="booth"
//i am not sure of the exact directive format
//u need to have designware foundation libraries.
//this is for synopsys DC
endmodle

This is a simple code.

---will there be enough multipliers in asic or not?
U can implement howmuch ever u want.Not like FPGA limited resources

thank you very much for your answer...........

i have one more doubt, in fpga i will get the output for a 32x32s multiplier within one clock tick, is it possible to get the exact same while converting to asic without consuming much resources. what is maximum delay possible to have this operation done?

hi
pls do note tat ASIC is always efficient than FPGA(in computing,i.e.resource utilization and speed)
hence u will get the output in a clock period but u have to have the multiplier tat works in a single clk in the lib.
i.e u have to tell the synthesis tool tat u are optimizing for speed and give directions to use the fastest multiplier available in it's library.