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PHY remote testing

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When setting KSZ9131RNX to Remote Loopback, in addition to the register settings, there is a description that says "Connect RX_CLK to TX_CLK".



Q1.Does this mean physically connecting Pin to Pin?



Q2.If the above is correct, there are no pins named RX_CLK and TX_CLK, but does RX_CLK mean RXC (35 pin) and TX_CLK mean TXC (24 pin)?



Screenshot 2024-04-18 111540


[KSZ9131 Datasheet, Page#37, Section 4.13.2 REMOTE (FAR-END) LOOPBACK]

Link: https://ww1.microchip.com/downloads...UNG/ProductDocuments/DataSheets/00002841D.pdf
 
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I read datasheet so that Q1 and Q2 answer is yes. As clock connection is listed as separate point in addition to setting remote loopback register, we can conclude that it's not achieved just by software.

Other PHY chips like LAN8742 are enabling remote loopback by just setting a bit, so neccessity of external connection for KSZ9131 is probably a silicon bug or something that the designers couldn't make easily software configurable.
 
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