Overheating LM2596S-5 - Help me fix my first board design

it's a moisture sensor. just to pins stuck in the ground, measuring the resistane between each of them.

Hi,

electronics design does not work with photos. It needs electrical specifications.
No 3MBytes of datas is needed, just voltage range, expected precision, sampling_frequency or frequency_range of intereset, and all other informations that are important for your application.
I guess less than 100 bytes.

Klaus

The schematics are right above.

Not a very reliable sensor to use dc for moisture content compared with ac.

I agree with Tony. If you pass a DC current between the probes you will cause metal migration between them (like electro-plating). A far more reliable solution is to use AC and even better to use the capacitance between the probes. If you use capacitance, the probe electrodes can be insulated so all chance of damage from surroundings is removed.

Its a bit tricky to do but mostly a software problem - I use the principle in one of my designs: connect both probes to analog input pins then alternate digital high and low on both probes but out of phase (one low when the other is high), this effectively makes AC appear between the probes. The probe NOT being driven high is then switched to analog mode and two voltage measurements are taken a few mS apart. The drop between the measurements is proportional to the capacitance between the probes and therefore the conductivity or their surroundings. I do it in a PIC but it should work equally well with an ESP32.

WOW! I will prototype it and figure it out. Thanks!!

So I took all of the advice I was given by you guys (at least the ones I could figure out) and created a 2.0 version of my controller and sensor (both share the exact same schematic minus the relays for the sensor).
Before sending it to printing, I would like your feedback on the PCB design.
Here is the schematic, and then the controller and sensor.
Thanks again @D.A.(Tony)Stewart, @FvM , @danadakk , @betwixt, @PlanarMetamaterials, @KlausST, @betwixt for your insightful input so far; it took me a serious way forward as a rookie.

What are your design specs? expectations for 5V regulator with high series Q FB?

Comments:
1. You still have minimal heatsinking on The LM2596 regulators. Place an array of via holes under the body to conduct the heat to the copper on the other surface.
2. There seems to be tracks overlaying the copper pour on both boards, it isn't needed and may confuse the PCB company.
3. If you intend to use the WiFi facilities on the ESP, keep the area under the antenna clear of copper, it will reduce the range.

Incidentally, I always use the WiFi, updating "over the air" is much easier than connecting by ICSP.

Brian.

Hi,

I see problems.
Mainly because the power input, to the relay output .. these are the most noisy signals mayby carrying high currents, switched currents.
The longer the traces the better (= worse in the meaning of EMI) the antenna to send out the noise. Thus keep it short.
I´d isolate them from the other more sensitive signals as good as possible. Otherwise they may cause the ESP to become unstable / reset.

My approach looks something like this.

The red arrow just shows the short, direct path of the most noisy power signals.

The green line across the relays shows where I´d put a split in the GND plane. A wide split, maybe 5mm or more.

The next rather noisy switched signals are the relay coil signals. They get their own path from right (power supply ) to the left (relay coils).
The next green line shows again where a split in the GND plane could be.
Mind that each "C" shows where I´d put a capacitor for power supply decoupling.

Then you see a very short path from power supply connector to the power supply.
(The power supply can be seen as a star point to distribue power in individual dirty and clean paths.)
From the power supply you now could easily provide the "dirty" power to the relay coils and the clean power in direction to the ESP.

Mind the antenna gap for the ESP!!!!

****
The rest of your circuit is rather uncritical and may be placed in a way that the GND plane is most solid.

Bottom side should be GND. GND, GND. Best when there are no other traces. And when there are traces they should be short not to cut the plane into pieces.
With my approach you will find it way more easy to get a solid GND plane.

***

Maybe you are not aware. But in your blue layer there is a wide area in the center of the PCB. Looks nice, solid, but indeed it´s useless. There is no via, no connection, no current. It does nothing.
But when you follow the GND on your blue layer:
Power connector --> right to the power section (getting dirty) --> in a narraw path to the most right bottom corner --> then to the right top --> supplying the ESP --> then back to the left to the dirty relay coil section.
For sure it is supported by the GND in the red layer .. but it is way worse than all GND just in one layer and the signals in the other layer.

Maybe you have the time to do a redesign, maybe not. If not then keep these ideas in mind for your next project.

But if you do a redesign: Do the placement first, no routing. Just show us the raw part placement. Then we can discuss the next step while not wasting a lot of your time.

Klaus

Choose a lossy L2 to reduce ripple and lower Q at 1 kHz with DCR approx ~ 0.2 Ohm, since load << 3 A

Thanks again. You are my heroes!

@D.A.(Tony)Stewart:
1. Did you mean L1 (the only one I currently have) or add another one?
2. Would this be a good candidate to what you had in mind? https://www.lcsc.com/product-detail/Power-Inductors_APV-APSWPA6028S330MTF_C5363728.html

@betwixt :
1. Done now, I think...
2. Got it now, I think this is correct now...
3. Using ESP32 model (U) with an external antenna so no need for the keep away zone
4. Need the PROG input only for the first download, and for emergencies.

@KlausST I hereby prompt you to a Sir. Thanks for the extra mile to draw this illustration. Now I better understand what I needed to do (I Hope).
As (Sir) Klaus suggested, I made a scratch of the copper zones and placement, with just a conceptual placement and some connections
to understand if I am making any progress in the right direction.

Thanks again.

200 mOhm was estimated for 68 uH not 33uH+ 480uF. Lower L will rise too fast in current stored for 24V in. unless C is reduced, use datasheet to choose/reduce C. perhaps 100 uF But I am not sure about low frequency resonance with no relay load. It is best to simulate this for transient RL loads and overheating.

avner_g said:

if I am making any progress in the right direction.

Click to expand...

Yeah! That´s it!. Very well done so far. You completely understood what I meant.
What huge GND planes, good heat spreading, short traces, less crossings.
The placement looks more esthetic ... and more space for relaxed routing.

My ideas: (only minor issues)
* I just recognized that the coil control lines all cross themselfes. You could just re-order them at the ESP so that now_relay1 becomes relay6, 2->5, 3->4, 4->3, 5->2, 6->1.
* this is true for all pins: re order all of them to make the PCB more straight forward. (for sure one needs to keep special functions in mind)
* you may move PROG1 more left than U2 .. for example.
* the trace from the switcher_IC to L1_pad1 is rather noisy (voltage and current), to improve you could move C6 most left (and turn 90° CCW) also move L1 to the left.
* Focus on the bottom (blue) layer to be GND. (I´m not a friend of the additional TOP GND pour. But it´s more a personal taste).
Now look at the trace from C6+ to the relay coils .. it cuts the bottom GND plane into pieces. Unnecessarily. Just route it on the TOP.
* again Bottom = GND: Mind to put at every TOP GND pin one (or better two) vias directly down to GND.
* I understand that the layers at the relay contacts are both the same AC signal. You could use different layers for the two AC signals respectively. You see one AC signal is directly wired to the connectors and diodes. The other could give a solid connection to the relay_COM contacts (straight vertical).
* You have individual GND_layers for relay_coil and ESP. Not wrong. But not necessary either. Look my green dashed line, it stops at where your C6 is.
(btw - my bad - this split does not need to be wide. It should just avoid that the relay currents pass the ESP area --> to give the current a direction to the big 5V capcitor.
* all the power traces (+5V, coil_power, coil contacts..) may be much wider. But that´s maybe some optimizing job after all routing is finished.
* Place the other parts that routing is most convenient = least crossings.
* I´m not sure whether there are enough decoupling capacitors.
* Depending on load .. the relay contacts may cause arcing when opened. This is a source for really bad noise. If you have the time/nerve then just add pads for optionally installing MOVs. just in case...

The thing with such a design is: It is not spectatular, but it is reliabale and rugged. Build it - and it should work for years without problems.

I´cant wait to see then next step in progress

Klaus

Wow. Okay. Did my homework.

1. Based on @D.A.(Tony)Stewart recommendation on lossy coil, changed L1 to this https://www.lcsc.com/product-detail...roelectronics-Tech-FNR8040S680MT_C168140.html . Hope it is a correct one.
2. Re- "recognized that the coil control lines all cross themselfes" - fixed.
3. Re-"trace from the switcher_IC to L1_pad1 is rather noisy: - fixed.
4. Re-"look at the trace from C6+ to the relay coils .. it cuts the bottom GND plane into pieces" - fixed.
5. Re-"GND: Mind to put at every TOP GND pin one (or better two) vias directly down to GND" - added.
4. Re-"You could use different layers for the two AC signals respectively." - Hope I understood correctly your thought - moved all the AC stuff of the coils to the back.
5. Re-"You have individual GND_layers for relay_coil and ESP..." - fixed and redone.
6. Re- "all the power traces (+5V, coil_power, coil contacts..) may be much wider." - changed.
7. "Place the other parts that routing is most convenient = least crossings" Did my best, all important lines are straight, all not less important (LEDs, programing) crossing.
8. "I´m not sure whether there are enough decoupling capacitors" - Not sure what to do with this if this is an issue.
9. "the relay contacts may cause arcing when opened... If you have the time/nerve then just add pads for optionally installing MOVs.". Added 6 MOVs with the same spec of the main one: https://www.lcsc.com/product-detail/Varistors_RUILON-Shenzhen-Ruilongyuan-Elec-07D470K_C13885.html hope they are good.

Do not commit until you simulate the overheating problem on LM2596S-5. There will be a startup 3~6A surge problem.

They tend to overshoot 50% or overcurrent on startup.

You need the following parameters to simulate:.

Rated VA and 24V on transformer or DCR of secondary
ESR of all big caps
Max current of L1 must >=3A for start surge then DCR
Relay current or R value and estimate of L

LC values may need to be reduced.

and a minor point - you still have ground tracks across the ground plane. They are not necessary and may confuse the PCB manufacturer. Remove the tracks but leave the via holes to link top grounds to the bottom ground plane.

Brian.

If Vin AC switches on at Vpeak, L1 will act as a resistor and conduct >10A for a couple hundred us. But if turned on at zero crossing it won't. So random starts could be stressful to ferrite with 50W impulse.

Hi,

you really learn fast. I´m impressed.
And it´s so much clearer now. You immedately can follow the power and the signals.

What you did is already good. So see my recommendations below just as some fine tuning.


I see you put vias IN the PAD area of the SMDs. Electrically this would be good, but it may cause production problems.
(in detail: The solder may flow into the via holes and thus there is too few left to solder the part properly. Additionally the flux in the via hole may cause gasses in the oven and "blow" away the part above.)

Don`t relay on the top GND. Please really set one or two vias close to each SMD pad with GND.

Then reduce (make shorter) all traces in blue layer.
Example: the ESP needs a capcitor for power supply. Let´s say pin2. What you need to know: The loop: ESP_pin1 - capacitor_mins - capacitor_plus - ESP_pin2 needs to be as short as possible. If you don´t set vias close to ESP_pin1 you have an endless long loop.
Then look at the trace of ESP_pin7. Make the TOP trace as long as possible, the BOTTOM trace as short as possible.

Then see the long blue traces to the LED connector. You may move teh LED connector more left.
But if you don´t want to move it: the blue traces cross three red traces vertical from POWER1 connector. Swap layers of all 6 crossing traces. This needs 3 extra vias for the vertical traces only, since at the POWER1 connector you already have "natural" vias as THM pads.

Do the same optimisation to all blue traces.

See C6 (plus) as star point for power supply. Route Relay_5V not to L1 but to C6. (L1 is noisy). Same: Don´t route POWER1_5V to L1 but to C6.
Since C6 is an electrolytics capacitor it has rather high ESR (compared to a ceramics C). Thus I´d add a ceramics C in parallel to C6 to suppress high frequency noise. If you do so, then the new capacitor is the lowest noise point and it should be the star point for 5V.

Klaus

The layout looks cool, but the regulator still looks hot. Until you define exact parts with loss parameters, it is likely to work a few times then fail when you start up on peak voltage. with 470uF at 28V E=0.5CV^2= 0.184 J . 480uF @ 5V = 6mJ = 6mW-s or 60W-per 100us or 30W/200us Depending on T=RC and T=L/R surge time constant this may result in same heat rise. If loss is 20% of max steady-state, I hope this package can handle it if you cannot simulate it.

The acdc startup works best if it started with a Triac ZC switch or NTC surge limiter because L will operate in nonlinear mode starting up with peak 24V on power up.charging up output without PWM slow start as this is just a simple regulator.