Correlation of corners

Hi guys,
How do the corners affect passive components? Do FF,SS,TT affect the resistors and capacitors?
Another question, is there a tendency that a particular set of corners happens? Is it unlikely that fast NMOS comes with slow PMOS? Do you usually run ff,ss,tt or different combinations also like fs,sf ?

The question how you create model files.
Common practice in industry is to separate models for all kind of devices (separate file for resistors, caps, fets, varactors, etc) and simulate all possibilities (also with supplies and temperatures).
However, even with this you can expect various corners between device flavors in real life, i.e. poly vs diff resistors or lvt vs rvt mosfets.

Thanks. The result will be a very large number of combination. How can the designer intuitively narrow them down to a few combinations that result in the extreme performance?
From resistors and capacitors perspective, are there any correlation between their "slow/fast" and the slow/fast of MOS?

Resistors will follow their in-layer lithography and
doping variations. So poly resistors may track MOS
speed / drive, but inversely to the extent that poly
patterned W affects R - MOS Leff will go down, R up
as gate gets over-etched.

MOS caps, duh....

MOS Tox ought to be confined to same-same (so
"dumb" FS, SF corners are unrealistic, if far-apart
Tox values are applied).

Are you asking about correlation of parasitic R and C values (i.e. BEOL/MEOL) with transistor variations (corners), or about design resistors and capacitors?

timof said:

Are you asking about correlation of parasitic R and C values (i.e. BEOL/MEOL) with transistor variations (corners), or about design resistors and capacitors?

Click to expand...

I ask about design resistors and capacitors.

OK, design capacitors can be of different types.
For example, MOM (interdigitated) or MIM capacitors - they are affected by the BEOL, that is not correlated with the FEOL (transistors).
On the other hand, such capacitors as MOS caps, varactors, etc., may be correlated with the MOSFETs.

Similarly, with resistors - some of them ma be correlated with the FEOL (diffusion, poly), some of them are not correlated (e.g. thin film resistors).

In general, usually correlations are not well modeled bye the PDK - e.g. uncorrelated (in real life) metals and dielectrics are still treated as fully corre;ated by the BEOL corners (typical, RC worst, RC best, ...).

Industry tried statistical treatment of various variations (e.g. statistical STA), but gave up, due to complexity.