which opamp should be used

i want an opamp which could drive a cmos switch.which type of oamp i should use.what spec i should keep in mind while designing that opamp.

To drive a switch, the GBW of the OPAMP should be more than 3 to 4 times the switching frequency. Also, the opamp actually should also drive a cap the switch is trying to charge. Hence, your opamp should be able to slew the capacitor.

thank you for your help vamchi.
one more query.does the on resistance of the switch plays any role for the driving capability of the opamp or i should only concentrate on the capacitive(the capacitance which switch charges) driving capability of the opamp.

The ON resistance actually effects the settling rate of the Opamp. Try and put a transient simulation and then switch the switch ON and OFF to test the settling constraints. Load wise, it is the capacitor which is critical. It is because with a switch and a cap, the only DC path to ground is through the capacitor.

dear vamsi,
you mean to say that the on resistance has no effect on the loading of the opamp.but how it could be.because just at the o/p of opamp switch is placed.capacitor is placed after the switch.
moreover my capacitor is of 40pf value.which opamp architecture is useful to drive this vaue of cap.thanks in advance.

40 pF is a very big capacitor. If you do not have a power constraint, you can try to drive it with a normal OTA. If power is the constraint, you should have a current stage(Class A or Class AB) in your opamp. Like I have said, the switch resistance will not have any effect on the DC gain of the opamp but on the GBW and settling. If the resistance causes a LHP zero, then the output will settle anyways....

dear vamsi,
what i think is if the o/p resistance of opamp is high compared to switch on resistance,the o/p volatge will drop.am i right.

moreover,please tell me in detail how switch resistance has an effect on bandwidth and settling time of opamp.

Dear Avinash,

Coming to your case, firstly DC gain is only effected by the output load which causes an effective resistance of less than r0 to ground. Remember at DC, the gain is gm*(r0||RL). In your case, I do not see any direct path to ground. It is through a switch(which has very less resistance) and a capacitor. Hence there is no direct RL (of the switch) which can reduce the DC gain.

Well coming to the GBW, I meant to say that instead of a simple pole at the output in the form of Capacitance, you now see a load of Switch ON res and a cap in series as load. This will cause a LHP zero in your Magnitude and phase responses. So, stability might be critical in the sense that there could be damped ringing. You need to size the switch such that, the LHP zero is outside the clocking frequency of the switch.......

Greetings.

Avinash, can you post a schematic or drawing of your circuit ?

I would like to understand the way you are connecting the capacitor you talk about.

Thanks in advance.

dear vamsi,thanks.

i have designed an opamp with 5pf load.
now i simulate the phase margin for 25pf load connected between o/p of opamp and vss.obviously my phase margin will deteriorate.
now i simulate the phase margin for 15k resistance in series with 25pf cap between o/p of opamp and vss.now my phase margin improves.what is the reason behind that.is that the LHP zero impoving the phase margin.if yes,how and how the LHP zero comes into the picture.moreover if LHP zero is improving the phase margin,what is the need to worry about.

i think enrique has understood the problem too.there is no need to send the schematic.

Dear Avinash,

There you are....you are right,crystal clear.

dear vamsi,
you didn't tell me how the LHP zero comes into the picture.moreover if the LHP improves my phase margin,what is the matter of worry?

Ok...LHP zero is increasing the phase margin.
similarly it will increase the gain at -20db/dec.
so there may be a prob with o/p swing.