[SOLVED] What is exactly my job status with these experiences?

Good morning everyone,
maybe the question does not concern about this forum section, but I don't know who to ask.

Until now, I work in an aerospace company. I have totally designed a RF filter with lumped elements by following the typical design flow: I've designed the ideal filter by using the S-parameters of lumped elements; the filter, then, has been implemented on PCB, and finally I tuned the design by using the CST to analyze the PCB, especially the parasitic inductance due to lines. I used a co-simulation paradigm to perform the tuning.

At collage I have also designed a k-band low-noise amplifier in ADS for an exam. Even if it was made for an exam, the project has required very very effort (it was also forseen the design of layout) and, if you had wanted, you could have asked professor to send the design to foundry in order to realize a prototype.

I know well that I have no many years of experience about RF designing, but... Would all these experiences qualify me as RF designer? Could I write this status in my CV or it is soon?

Thank you

Why don't you just put (maybe a little more concisely) the experience you just described in your cv, rather than a title. Maybe you could put RF designer as your career goal; designing one filter doesn't necessarily make you one.

Exactly what barry said. There is no technology company in the world that will hire you as an RF designer right out of school - you don't really know all that much. Text books are usually 10 years behind state-of-the-art and professors are even more than that. I would expect any RF engineer to be able to design, build, test and implement any lumped element filter without breaking a sweat. He would also know that the biggest parasitic element is the capacitive parasitic - at lumped element frequencies, the inductive parasitic is very, very low and is almost insignificant (in a proper design) Also, I would expect him to know that any design based only on design software is just step 1, with many following steps needed to complete the design.

Just spell out honestly what you have done in school and at previous jobs and state that your goal is to become an RF engineer. Most companies know that you really don't know anything, but your experiences in school will show your ability to learn.

SLK001 said:

Just spell out honestly what you have done in school and at previous jobs and state that your goal is to become an RF engineer. Most companies know that you really don't know anything, but your experiences in school will show your ability to learn.

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You're right, I was very arrogant to think of being a RF designer with these few experiences.

SLK001 said:

He would also know that the biggest parasitic element is the capacitive parasitic - at lumped element frequencies, the inductive parasitic is very, very low and is almost insignificant (in a proper design)

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I didn't understand why capacitive parasitic? In my project, I tuned (decreased) the inductance of lumped inductors to take into account the effects of lines. After CST analysis, I had a frequency response of filter shifted to left, as said here: https://www.edaboard.com/showthread.php?t=369362&p=1581941#post1581941
Decreasing the inductances, I've corrected the frequency response.
So, why have you talked about capacitive parasitic?
I apologize if I look naive and ignorant, and thank you for helping me to understand.

What is the inductance of a 2mm x 4mm strip of copper? How does that compare to your lumped inductors? What is the capacitance of the same strip of copper? How does that compare to your lumped capacitors?

You don't state the properties of your lumped filter, so I'm assuming that it is less than 1GHz.

SLK001 said:

He would also know that the biggest parasitic element is the capacitive parasitic - at lumped element frequencies, the inductive parasitic is very, very low and is almost insignificant (in a proper design)

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From my experience, series inductance in the PCB shunt path is often relevant.

Hello everyone,
I have verified my design by calculating the parasitic inductances and capacitances. I found out that SLK001 had right: the parasitic capacitances of lines and base-plate of SMD components have shifted the frequency response to left in frequency.
I have supposed that s-parameters of lumped-components don't take into account the parasitic capacitance to ground of base-plate.
The filter shall work about at 400 MHz, but the frequency should not be the problem because of geometric nature of parasitic capacitances. I've calculated the capacitances without take into accout the frequency by supposing the effective dieletric constant not-dispersive at that frequency. What do you think about it?

Anton89 said:

Hello everyone,
I have verified my design by calculating the parasitic inductances and capacitances. I found out that SLK001 had right: the parasitic capacitances of lines and base-plate of SMD components have shifted the frequency response to left in frequency.
I have supposed that s-parameters of lumped-components don't take into account the parasitic capacitance to ground of base-plate.

Click to expand...

That's the way they are supposed to be. Since your pads may be different, you have to add your particular pads back into the design.

Anton89 said:

The filter shall work about at 400 MHz, but the frequency should not be the problem because of geometric nature of parasitic capacitances. I've calculated the capacitances without take into accout the frequency by supposing the effective dieletric constant not-dispersive at that frequency. What do you think about it?

Click to expand...

It is a lot easier to fold the parasitic capacitances into your design than it is to incorporate the parasitic inductance. Fortunately, the parasitic inductances are usually within the tolerances of your selected inductors. At 400MHz, the parasitic inductances are not significant. At higher frequencies, they become more and more significant and have to be properly dealt with in your design.