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[SOLVED] Common Mode Rejection Ratio

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M.Rehan

M.Rehan

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Referring to Page # 4 https://ww1.microchip.com/downloads/en/AppNotes/01332B.pdf

Capture.PNG

What does this means?

Do I have to use op amp with greater value of CMMR db?

Or there may be this much error at output?
 

The example calculates common mode error due to resistor mismatch in differential amplifier, also the additional imbalance caused by the source (=shunt) resistance. It doesn't talk about OP CMRR itself which is typically better than the resistor related CMRR by several orders of magnitude.

Limited differential amplifier CMRR is the main reason why alternative circuit topologies have been suggested in your previous high side shunt measurement thread https://www.edaboard.com/threads/353208/
 
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    M.Rehan

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Does your circuit have to cope with a high common mode input? If it does then you will have to work out what size the error is to see if its a problem. If there is no common mode voltage input, then you have not got a problem.
Frank
 

Does your circuit have to cope with a high common mode input?
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M.Rehan forgot to mention that the linked application note is about high-side shunt measurement. So high common mode voltage is presumed.
 

CMRR = common mode gain(CMG)/Differential mode gain(DMG)
In ideal case CMG= 0 and DMG is infinite so CMRR is zero

then why higher CMRR is better

What actually CMRR represents?
 

No, the other way around, as written in the application note
CMRR = 20 log (GDM/GCM)
 

Vout=GDM*Vd+GCM*Vcm

CMRR = GDM/GCM => CMR (dB) = 20 log(CMRR)

The higher the CMRR => the lower the GCM => the more the output is what you expect

Then you have offset too...
 
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