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What value of bypassing capacitor should I put?

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Nizar_Ib

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Hi,

I'm designing an interface between FPGA and DDR memory.

What value of bypassing capacitor should I have for the vdd of my DDR?
my DDR is MT46H32M16LF for Micron.
There were no any manufacturer recommendation of the bypassing capacitors on the datasheet they provided!

Any help please ? ;-)
 

Hi,

To avoid giving incorrect advice, see if these help:

Micron - "Bypass Capacitor Selection for High-Speed Designs" (tn0006) - no link as it's a direct pdf download.

https://www.microsemi.com/document-portal/doc_view/129572-an0041-decoupling-in-high-speed-environments-rev1

https://www.ti.com/lit/an/scba007a/scba007a.pdf

https://www.murata.com/~/media/webrenewal/support/library/catalog/products/emc/emifil/c39e.ashx

If I remember well, they are all very helpful, and the Murata pdf has good calculations explained so you can calculate cap value well instead of plonking 0.1uF everywhere.
 
I would begin by looking at other DDRx memory manufacturers'
datasheets and app notes. Datasheets are the beginning, not
the end, of product support literature.

Bulk C value is likely less important (to a point) than the ESL/
ESR of the capacitors. Two parallel 0806 caps of half the
value may be better than one 1208 body will give you, and
so on.
 

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it was difficult to pick out the parameters needed to calculate the capacitor value.

I still not sure of it.

anyway, thank you, I got some idea from the files you sent.
 

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