BartlebyScrivener
Member level 5
I am using modelsim to compile some systemverilog files. When I click the compile button on the toolbar all is well. But when I type vlog *.sv into the transcript window I get the following error.
Where 202 is the end of file.
Yet, if I click compile it works! I am trying to write a script to compile the files so I need to be able to use vlog!
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Also, typing vlog ENoC_Network.sv compiles fine!
HTML:
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov 2 2012
# ** Fatal: Unexpected signal: 11.
# ** Error: ENoC_Network.sv(202): Verilog Compiler exiting
# C:/altera/13.1/modelsim_ase/win32aloem/vlog failed.Where 202 is the end of file.
Yet, if I click compile it works! I am trying to write a script to compile the files so I need to be able to use vlog!
- - - Updated - - -
Also, typing vlog ENoC_Network.sv compiles fine!
