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Display an image on VGA monitor through nexys2 board using EDK software

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nenavath

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Using xilinx platform studio embedded development kit(EDK), initially VGA peripheral should be configured,then to display images existing in PC to VGA through RS232(serial) communication.

sir i need a code to install .coe file(image) on to the FPGA board through SDRAM using EDK software.

i am getting the image( square,rectangle,triangle) of this type. but i m not able to install an image of type mickey mouse(600*300)

MY board configuration is: XILINX 11.1 version

family: spartan 3E starter board
XC3S500E
package: FG320
speed grade: -4
 

nenavath said:
Using xilinx platform studio embedded development kit(EDK), initially VGA peripheral should be configured,then to display images existing in PC to VGA through RS232(serial) communication.

sir i need a code to install .coe file(image) on to the FPGA board through SDRAM using EDK software.

i am getting the image( square,rectangle,triangle) of this type. but i m not able to install an image of type mickey mouse(600*300)

MY board configuration is: XILINX 11.1 version

family: spartan 3E starter board
XC3S500E
package: FG320
speed grade: -4
Click to expand...

hi,
I am also doing my M.tech project on the same idea of displaying an image on vga monitor.In which language did u write the code for displaying square,rectangle,traingle? I mean whether in VHDL or verilog or in c language using xilinx xps and sdk?
 
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lvcmos said:
hi,
I am also doing my M.tech project on the same idea of displaying an image on vga monitor.In which language did u write the code for displaying square,rectangle,traingle? I mean whether in VHDL or verilog or in c language using xilinx xps and sdk?
Click to expand...

in embedded c
 

Hi,
Can you please help me to achieve this.How you did this?
I'm using Spartan3e starter kit and EDK 9.2i.I need to display any of the four shapes(rectangle,square,triangle and circle) through VGA port depending upon the output.
Kindly help me.
Thanks in advance

Regards
vgs
 
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vgs said:
Hi,
Can you please help me to achieve this.How you did this?
I'm using Spartan3e starter kit and EDK 9.2i.I need to display any of the four shapes(rectangle,square,triangle and circle) through VGA port depending upon the output.
Kindly help me.
Thanks in advance

Regards
vgs
Click to expand...

u have to initialize first vga peripherals, and then generate a bit stream by converting jpeg image to coe extension file image,dump this bit stream to fpga, and display this on the vga monitor.
 
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Thank you for your reply
I've done the conversion section,ie I've converted the jpeg image in matlab to a coe file.Can you please help me in initialising the vga peripherals?
Kindly help me
 

nenavath said:
u have to initialize first vga peripherals, and then generate a bit stream by converting jpeg image to coe extension file image,dump this bit stream to fpga, and display this on the vga monitor.
Click to expand...

hi, i have a doubt here.we will initialize vga peripheral uisng xilinx xps and will generate a bit stream.but after converting jpeg to coe, how can we access or send that .coe data to display it on vga monitor? moreover i have done several experiments on initializing xps_tft ip core on different xilinx edk (10.1,11.1 , 13.1)versions. xilinx edk 10.1 does not have xps_tft ip core. so i tried on xilinx edk 11.1.but i am fed up with 11.1 as it always shows the error that the port names defined in ucf file is not matching with the original design. I have also done on 13.1. I can generate download.bit file in SDk.but when i connect it to spartan 3e and verify the color bar code example, I could see nothing on vga screen.

My question is how to access or send or store that .coe file data into spartan 3e board and read it ?
which memory element is best suited for that?
if so, how we can do that?

I am using Xilinx edk 11.1 version and Spartan 3e board

regards,
lvcmos
 
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Hi,

Have you resolved this issue? could you please help me.I don't know how to connect the Rom block containing the .coe file to EDK.
Kindly help me.Thanks in advance

thanks and Regards
vgs
 

Dear nenavath

How can we dump this coe file value into fpga to display this on the VGA port.please help me.thanks in advance

Thanks and Regards
vgs
 

vgs said:
Dear nenavath

How can we dump this coe file value into fpga to display this on the VGA port.please help me.thanks in advance

;;

hi, am also having same problem.

my work is process coe file through algorithm and the taking output processed data .

input data(stored in )ram => algorithm =>output data.

after adding your source(verilog/vhdl file).. right click->new source->
using ip core -> memories&storage elements -> ram/roms ->click on finish
it will shows new window: single port block memory.
give data_width, depth -> clock edge -> load init file(.coe file) ->it loads coe file and gives to your design.

i know up to this part .

i didnt get how to take output processed data. where it is stored and how to get it.
i want this output data as text or coe file. i didnt get how to do.

please tell me...
Click to expand...
 
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