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Question about PSRR@Frequency!

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lei6042

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How to decide the @frequency of PSRR of a circuit?
For example some may care PSRR @ dc ,some may care that @ 5M and so on!
To my view. if a system has Clocks with different frequency, the psrr of the designed
block has to be checked @ all the frequencies above!
Am i right?!
 

checkmate said:
PSRR : Power supply rejection ratio
What clock?
Click to expand...

Suppose a LDO will be designed for a system with different clocks, such as 10K 1.5M 12M 24M 48M and so on!
So do I have to gurantee the PSRR of the LDO @ all the frequency above?
In other word, how to decide the frequcy I care when I design evaluate PSRR performance of a LDO or bandgap ?
 

If that's so, you have to find out on the impact those clocks will have on the power supply, and the response requirements for users of the LDO and bandgap circuit.
 

checkmate said:
If that's so, you have to find out on the impact those clocks will have on the power supply, and the response requirements for users of the LDO and bandgap circuit.
Click to expand...

is it the right way to find the PSRR @ frequency?! or despite the exact clock the system includes, we just need check the PSRR performance from DC to 10M which some paper suggests ?
 

I've already stated how we decide PSRR requirements.
Some just give an arbitrary number when they have no clear idea on their requirements.
 
Hi lei6042,
I assume you are using famous form of LDO. Then generally you will be placing output pole to be dominant compared to the input pole(Amp pole), which generally improves the PSRR of the LDO. So, in your case, you have to place your output pole atleast at 48MHz to get a good PSR for complete range.
 
You can bet the LDO will be pretty helpless at frequencies above
1MHz, unless you're busy designing the first microwave LDO.
Most DC PSRR comes from the DC loop gain and that fades to
worthless well before UGBW. But you could take UGBW and
figure dB/decade backward fromt that point, or refer to the
chart, for a specific design's amplifier.

Some signals are "somebody else's problem" though.
 
dick_freebird said:
You can bet the LDO will be pretty helpless at frequencies above
1MHz, unless you're busy designing the first microwave LDO.
Most DC PSRR comes from the DC loop gain and that fades to
worthless well before UGBW. But you could take UGBW and
figure dB/decade backward fromt that point, or refer to the
chart, for a specific design's amplifier.

Some signals are "somebody else's problem" though.
Click to expand...

The LDO will be "helpless," but at some point the load cap should take over and the PSRR will be the ratio of the load cap to what ever cap you have coupled to the power supply.
 

If the LDO has dominant pole at the output (external capacitor) it always displays good PSRR irrespective of frequencies as long as it is stable (More than 45deg PM is required for monotonically falling noise gain). Internally compensated LDO's (Output pole as one of non-dominant poles) come with the limitation that the output cap cannot be made higher than a particular value to maintain sufficient relative stability. This implies that there will be a band between the dominant pole of the LDO loop and the frequency where the output capacitor becomes effective where both PSRR and load regulation will be quite poor. One has to make sure that the signal frequencies of the blocks the LDO supplies to dont fall in this interim band
 
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