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Recent content by ygu_sanjose

  1. Y

    Analyze the drive capability

    It is the driver close loop output impedance.
  2. Y

    LDO with NMOS as pass transistor..

    nmos ldo The ESR zero stays the same because it is 1/(ESR*C), but the pole is pushed further because of the NMOS output.
  3. Y

    LDO with NMOS as pass transistor..

    ldo nmos output May I ask why the zero created by the ESR of the load cap does not need to worry?
  4. Y

    Good book for cmos op amp

    Jacob Baker's books are good. One of his book is "CMOS Circuit Design, Layout, and Simulation".
  5. Y

    question of comparator

    A faster comparator should ba a pre amplifier (gain of 4-6) followed by a latch.
  6. Y

    use ptat current for opamp

    for MOS current mirror Veff = sqrt (2I/(uCxW/L)), so that (deltaVeff)/Veff = (deltaI)/I, for PTAT current, (deltaVeff) is worse. MOS mirror is worse match in PTAT current.
  7. Y

    Track and hold simulatoin

    For distortation analysis, you can do fourier transform of the output. For AC analysis, you can just do the hold mode operation. The common mode of the input and output are defined so that you don't need to worry about the DC bypass feedback.
  8. Y

    CM in fully differential circuit

    It depends on where the feedback tied to. If it is tied to the inputs, it is for differential mode feed back. If it is tied to the current source, it is for common mode feed back.
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