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Recent content by yargo

  1. Y

    How to reduce mistach in CMOS analog IC design?

    Some basic rules: 1. Increas the size of the devices to be matched 2. Use simmetric layout 3. Replicate the same geometry using series/parallel connection to achieve the wanted size. Bye
  2. Y

    about the ripple rejection for voltage regulator

    To get a low drop voltage regulator using an NMOS transistor as pass element you must use a dc/dc converter (such as charge pump) in ordet to generate a gate voltage higher than the drain voltage; in this way you may achieve a very low drop vreg but generally speaking the lower is the drop, the...
  3. Y

    about the ripple rejection for voltage regulator

    The keys of good supply rejection are: 1. High bandwith 2. High gain 2. Good PSSR of the error amplifier Generally speaking LDOs suffer from poor rejection due to the pass element wich is usually a PMOS, if you can cope with higher voltage drop, consider using an NMOS as a pass element. Bye
  4. Y

    How to desig Hi volt bandgap circuit ??

    To solve startup problem you could use a startup circuit: in this way you may use the bandgap itself as a reference for the pre-regulator.

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