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Recent content by yakkala.srikanth

  1. Y

    March algorithm for MBIST testing

    Hi rca, I want to understand what faults it trying to target by reading/writing in ascending order and decending order or which faults we can't detect if we do just reading/writing in either ascending/decending order. I hope you understand my question. can you please suggest a link or book...
  2. Y

    Please post some issues you faced during MBIST insertion and simulation

    Hi guys, Can you please share some issues you faced during MBIST insertion and simulation. Please share any kind of violation. atleast 1 or 2. Please share the fix too. That will be so helpful. Thanks Srikanth
  3. Y

    March algorithm for MBIST testing

    Can some body tell why in march algorithm for MBIST we do read and write in ascending order and decending order. What is the significance of it? Can some body suggest good books on this topic. which concentrates mainly on basics.
  4. Y

    DFT question and answers

    Thanks Maulin and rca. I thinks multicycle paths also not covered in transitions faults. Is that right?
  5. Y

    why do DFT no-timing simulations. As we have to do timing simulations anyway to check

    Thanks maulin sheth .
  6. Y

    DFT question and answers

    Hi RC, I dint understood your reply to the question 4. Why at-speed faults coverage is less than stuck-at faults coverage? Other than the set/reset logic which is not tested in transition faults, any thing else which are not covered during transition tests?
  7. Y

    why do DFT no-timing simulations. As we have to do timing simulations anyway to check

    Hi maulin, Thanks for the reply. AC means at-speed test only. Can you please share what kind of issues you face during simulations other than setup issues? Thanks Srikanth
  8. Y

    DFT question and answers

    1. Why we do simulation, even though we generate the patterns on the same scan stiched netlist. What are we expecting from simulation, as it is not the actual hardware we are testing? 2. Why people prefer doing serial simulation though it takes very long time compared to parallel simulation...
  9. Y

    why do DFT no-timing simulations. As we have to do timing simulations anyway to check

    Can you please answer other questions also.
  10. Y

    why do DFT no-timing simulations. As we have to do timing simulations anyway to check

    We do no-timing simulation to verify patters before the sdf and post layout netlist are ready? What are we verifying here? Patterns are generated by the tool. why do we nned verify them with the simulation tool again? Why serial simulation is prefered compared to parallel simulation though it...
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