Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
howto implement communication protocol
first, you need to understand CDMA communication system, you can try Matlab, agilent ADS, SystemView ...
then, you need a lot of ASIC design knowledge, analog, digtal, RF etc.
It's really a big project!
Re: frequency divider
you can design an 2-bit counter named "cnt[1:0]", return "00" when count to "10", negedge of clk;
then you can generate an 2/3 clk by this statement:
assign clk_out=clk&~cnt[1];
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.