Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
i would like to use an RTC chip with the VNC2 using an I2C interface. There is an I2C driver supplied with the Vinculum2 toolchain, but there is no documentation nor example on how to use it.
I use a vnc2-32L1B chip for my project. I decided to use for the I2C interface the pin 14 for...
Ok, i will put an eye on this nanovna.
This pin is the clock signal of an SPI interface at approximately 3 MHz directly connected to another chip on the board.
For the serial resistor, i will begin with a 0 Ohm value and adjust it if needed by using an oscilloscope. Is this the way engineers...
Thanks for the replies.
But I didn't know it was so complicated.
Someone tell me that it is a good idea to place a resistor (usually 22 or 33 ohms) in series with a clock line to improve the signal by reducing crosstalk and reflections and to achieve that, it was necessary to properly terminate...
Hi,
to reduce reflection and crosstalk, i want to place a serial resistor as close to the output pin of a PIC18F4550 used as a clock signal. But how to determine the output impedance of that pin ?
Is it 0.7/3e-3 = 233 ohms (According to datasheet on page 380, with IOH=-3mA and VOH = VDD-0.7) ...
Hi,
I use this protocol because i began this project with a VNC1 chip, then upgraded to VNC2 to change some things in the V2DAP firmware. As this part of the software is working fine, i didn't change it.
By removing one cycle, SPI transferts work fine now, but i just want to understand why...
Hi,
I use the VNC1L SPI legacy interface which is a FTDI protocol. As the SPI module of the PIC doesn't handle this protocole, i bit-bang its SPI interface. The PIC is the master, the VNC2 the slave. The PIC generates CS, CLOCK and SDI (MOSI).
The clock signal is generated when a transfert is...
Hi,
i am working on a little project based on a PIC18F4550 and a VNC2 chip, both connected via the SPI interface (in VNC1 compatible mode). I began this project with 2 evaluation boards, one for each chip (the V2EVAL board for the VNC2 chip).
As all worked fine, i decided to go to the next...
Hi,
Yes, i used a breadboard to test my software and that was the cause of the glitches.
I didn't thought this could cause problems at these frequencies.
I directly soldered the vdip1 module which containt the vnc1l chip on my developpement board and the glitches disappeared.
For the clock...
Hi,
The pic 18f4450 and the vinculum vnc1l controller are connected via the spi interface like this (signals are in the point a view of the pic):
clk => rb1 - output
cs => rb2 - output
sdi => rc7 - input
sdo => rb4 - output
I connect my logic analyzer to these signals to see what is happening...
Hi,
except the price (difference of 140 euros !), is there a real difference between the Digilent XUP USB-JTAG Programming Cable and the Xilinx Platform Cable USB HW-USB-II (USB to JTAG) to use with a spartan-6 development board ?
Thanks,
Willy.
Hi,
I am working on a little project composed of a VNC1L chip connected to a 18f4550 Microchip pic via the spi interface.
The goal is to handle an USB joystick.
The communication with the two chips works fine: The joystick is recognized, the report descriptor is read for decoding data coming...
Thanks for the reply.
I already took an eye on this web site but didn't find the answer.
It is possible to avoid vias in particular areas by using "keep out" area or pour polygon, but you avoid copper tracks to. And i don't know how to tell Altium not using vias.
Does anyone know an solution...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
