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Recent content by willyboy19

  1. W

    current mode IC Design

    Current mode design can be faster than conventional voltage domain design. But its linearity is moderate compared with voltage-mode circuitry. In some cases where you have a current source input (such as diode or LED), it can be convenient to use current mode design.
  2. W

    What HSPICE command will simulate LDO noise ?

    Re: LDO noise The LDO noise is no different from any linear circuitry noise simulation. In HSPICE, you can use .noise statement in conjunction with .ac statement to simulate and calculate the noise transfer function, input-refered noise and output noise. You can check HSPICE mannual for more...
  3. W

    How to configure an ideal switch in Cadence?

    cadence sp1tswitch There is a 'switch' component in ahdlLib. It is written in VerilogA. You can try it.
  4. W

    About line regulation of LDO

    line regulation ldo The output should not change with the input for an ideal regulator -- that is why it is called a 'regulator' anyway. The limited line regulation can come from different sources: bandgap voltage (or reference voltage) line regulation, error amplifier finite DC gain (but NOT...
  5. W

    Looking for audio codec IP!

    Re: who have audio codec ip? For what purpose?
  6. W

    Let's discuss this real-world opamp

    It is indeed an interesing opamp. One thing I noticed here is the role of P2 and N3: they indeed form a positive feedback with Q8, R2, R3, N3 and R7 loop. With proper amount of this positive feedback, very high impedance at E and F nodes can be obtained which makes this opamp very high gain and...
  7. W

    What is the purpose of resistor R in this circuit?

    Re: Purpose of Resistor R Set the DC gain of this stage. The two diode-connected transistors ease the DC bias of the following stage.
  8. W

    Register File declare/synthesis question

    register file I plan to use 80 register files in a design. Since I only use 80 of 128 register files, do I have to declare all the register files as following? reg [23:0] REF_FILE [127:0] The 80 register files I used do not have continuous address assignment (mostly to easy state machine...
  9. W

    Anyone study the pape"A 14-Bit intrinsic Q2 Random Walk

    Re: Anyone study the pape"A 14-Bit intrinsic Q2 Random Do you happen to have the paper? Can you post it in your question so that we can have some idea of wha you are talking about?
  10. W

    Spectre slows down when Linux kjournald process is active.

    linux kjournald When running Spectre under Linux 7.3, I found that when the simulation is large, the 'kjournald' process starts to take over 70% of CPU time, which siginficantly slows down the actual simulation. I can not kill it even trying as root. Can anyone tell me what is this process...
  11. W

    What happened in this telescope stage?

    M3a and M3b should operate in saturation region to achieve the required DC gain (that is exactly the reason why using a telescopic OTA). Make sure all the transistors operate in saturation region and put 2~3 pF compensation/load capacitor and re-run the simulation. You should be able to get...
  12. W

    How to verify a long series of bits is random or not ?

    A direct way to check if the sequency is truly random is to use auto-correlation function in MATLAB. A true random sequence should generate a Dirac type auto-correlation output, whose Fourier Transform should give you 'white' spectrum density function. In matlab, you can use xcorr(A), where A...
  13. W

    How do building up full differential folded-cascode model?

    Re: How do building up full differential folded-cascode mod I guess what you really need is a fully differential OTA behav model in Verilog-A. If that is the case, you can build it with the prototype in ahdlLib and then exapnd it to include more non-ideal effects, such as finite bandwidth...
  14. W

    Sample & Hold ENOB Measurement problem(INPUT pulse).

    Usually SHA is used in together with the following switched-capacitor circuitry for further processing ( a good example is pipelined ADC). Thus, FFT analysis is definitely useful if you pay attention to where and when to process the data. The pulse response is useful, but it does not provide...
  15. W

    question about LDO with 1.5V fixed output

    I agree: PMOS pass transistor can be used since you still have 300mV headroom even when the supply is 1.8V. You probably don't want to mess up with another charge pump if you need a 'quiet' regulated output voltage at 1.5V. One thing to remeber is to carefully calculate/simulate the...

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