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Recent content by wang.yuanzhuo

  1. W

    Current steering DAC,glitch help

    Thanks a lot. The switch PMOS in LIN region is the biggest problem. Now I'm trying to rise the control voltage. Thanks for your suggestion
  2. W

    Current steering DAC,glitch help

    Is there anyone help me? Help!!!!!
  3. W

    Current steering DAC,glitch help

    glitch in current steering dac the circuit cell Added after 12 minutes: Added after 11 minutes: I'm design a DAC used the classic current steering circuit. But I need a large fixed output voltage range. It cause large step in the common source node of switch M3 and M4 (>300mv), also a...
  4. W

    Problem with the Rail-to-Rail OP

    I'm reading the paper "A Rail-to-Rail Constant-gm Low-Voltage CMOS Operational Transconductance Amplifier" Ferri, JSSC. I'm puzzled with the explaination of the circuit Fig.2(b), especially the voltage regulating. Could someone give me a clear explaination?
  5. W

    which is the best op amp book?

    Allen's two chapters and Huijising's book are well, but they need better knowledge
  6. W

    Reference current source circuit?

    I think it's hard to implement reference current in intergrated circuit because the resister. In razavi's book he instead resister with switched capacitor. I think you could try it ,but the clock and speed maybe some difficuit.
  7. W

    a simple question about Mosfet

    No. In the analyze of large-signal, he said "For Vin<Vth1,M1 and M2 are off, Vout=Vdd, and Vx=Vb-Vth2" , maybe here is some problem
  8. W

    a simple question about Mosfet

    Thanks, i saw Razavi's book "design analog cmos IC', in figure 3.51,he said when m1 is cut off, the voltage of node "x" was 'vb-vth2'. But i think it is floating, so i am puzzled
  9. W

    a simple question about Mosfet

    i'm puzzled with a simple question. For a simple mosfet,when Vg and Vd is fixed, Id=0, and Vs is floating. How much is the Vgs, Vth or 0, or we can't get it?
  10. W

    differential amplifier with CMFB

    I think you could try to read this paper "Cadence - Functional Verification of a Differential Amplifiers"
  11. W

    DA beginner question about allen'book

    i'm reading allen's "cmos analog circuit design" in example 10.4.2,i think the answer should will be (25/16)Vref, but it comes (19/16)Vref, i think the way he give us is right. Could someone give me the reason? Is there another coding way? 11001 is not 25?
  12. W

    Show me the Kp value of PMOS with 0.25um and 0.35um process?

    Help me now!!! simulate a transister with hspice. it will give you the answer. but this parameter is not constant with the circuit condition
  13. W

    Help me solve a problem with two stage cherryhooper amplifier

    cherryhooper help raj,i'm sorry i can't sent the architecture to you for some reason. i'm glad to know you,my email is wang.yuanzhuo@gmail.com
  14. W

    Problem with the limiting output stage in a front-end amplifier

    i use a simple differental pair with res load as a limiting output stage in a front-end amplifier. but when i give a differental singal in,the output achieve the limiting state but with a large peak. could someone give me some advise? i use a resistance as the emitter degeneration.
  15. W

    Help me solve a problem with two stage cherryhooper amplifier

    cherryhooper help actually i could get b/w and gain in one stage,also i could get a 30db 10gb with 2 stage,but i find it's hard to get a flat amplitude response. so the eyedigram is so bad. have you met this question?

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