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Recent content by vvanders

  1. V

    I am looking for a low cost CPLD which supports I2C

    Re: Good CPLD I'm really only familiar with Xilinx's offerings but looking at Lattice's CPLD they've got some impressive devices! How good is their toolchain compared to Xilinx?
  2. V

    Source for 4 layer prototype boards?

    That's more along the lines of what I was looking for! ~$170 is more reasonable then $400+.
  3. V

    Source for 4 layer prototype boards?

    pcb pool prototyope 4 layer I was wondering if anyone knew a good place for getting prototype 4 layer boards? I've got a pretty small board(2.5"x4") and most places want to change $300+ per run. I know batchPCB can do 4 layer boards but the turn around time is 2-3 months(!).
  4. V

    Switching between 3.3v and 5v power output

    switching 5v by 3.3v I'm currently in the process of trying to build a really simple logic analyzer. As part of this I want to be able to interface with TTL, CMOS and other logic level busses. I found this which should handle my level shifting just fine. Where I'm running into issues is trying...
  5. V

    testpin<=clock; not working

    I would guess that's because the only time the output is updated is when the clock is high(rising edge).
  6. V

    Allowing integer overflow in VHDL

    overflow in vhdl I was hoping I wouldn't have to do that and VHDL would have a much more C like handling of integers, ah well.
  7. V

    Allowing integer overflow in VHDL

    vhdl overflow I'm in the process of converting a design from verilog to VHDL, one of the parts of my design contains a circular buffer that was just using a counter that would rollover back to 0 when it overflowed in verilog. Is there any easy way to do this in VHDL? I'm using a integer type...
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