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Recent content by vivek.roy2991

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    [Moved]: Locking range of very low bandwidth PLL

    Shorting resistors while loop seems like a nice idea. But I wonder what guarantees that if the loop is unstable to begin with, it will lock?
  2. V

    [Moved]: Locking range of very low bandwidth PLL

    You can use a dual loop PLL. You can look at dual loop PLL as having one very low bandwidth path (but high gain) that keeps changing the 'center frequency' of the VCO. During the initial lock time, you can increase the bandwidth of the path to get fast lock, and then when you are close to lock...
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    [PIC] Can Mplab C30 choose chip PIC24F16KA101 ?

    Yes it is supported. Check the following link: https://ww1.microchip.com/downloads/en/DeviceDoc/Release%20Notes%20C%20for%20PIC24%20and%20dsPIC%20v3.10%20%28C%29.htm But as pointed out in this link, https://www.microchip.com/Developmenttools/ProductDetails.aspx?PartNO=SW006012 , it is...
  4. V

    Measuring AC or DC motor Speed,

    Optical enocders, tacho-generators are two easy examples. Tacho generators give noisy data. Optical encoders give better and more reliable results. Of course you would need a microcontroller with a quadrature encoder interface(QEI) module like the dsPIC30F4011. The TIVA C series launchpad from...
  5. V

    [PIC] Problem in 7 Segment

    It says that it is an invalid attachment. Can you be more specific as to exactly what is not working or what is happening? Note that if MPLAB does not give an error, it means that it compiled the code successfully. But it gives no assurances that your code will do exactly as you want it to.
  6. V

    Any good books for RFIC in the perspective of CMOS or BiCMOS

    Yes. This book really teaches you to think intuitively. Although it does not treat second order and bulk voltage effects in details, its still a great book.
  7. V

    Results from ADC on SPARTAN 3E board

    As pointed out ads-ee, you are treating the data as if it is unsigned integers where in fact the data you received from the ADC is in 2's complement form. And you are probably transmitting the data back to your PC with a UART. So you are getting your plot like that. (I am sure of it because one...
  8. V

    [SOLVED] Failed to converge in PSpice A/D Lite

    Thank you sir. Once I connected a 1ohm resistance, it worked perfectly.
  9. V

    Comparison of Comparators and OTAs

    I will try and answer the second part of your question first. I think what you mean is that how does a voltage comparator like LM311 differ from using an op-amp, uA741, as a comparator. At first glance, both may seem similar since an op-amp, in open loop, behaves as a large gain differential...
  10. V

    [SOLVED] Failed to converge in PSpice A/D Lite

    I am trying to simulate the effect of bulk voltage on drain current. This question is also present in the book "Design of Analog CMOS Integrated Circuits" by Behzad Razavi. I am trying to plot the drain current as a bulk voltage varies from 0 to 3V. (please see the image attached with this...
  11. V

    simple vhdl code for I2C master

    Will need more than that to help you...
  12. V

    Counter inferred from VHDL

    you can program your FPGA board with this code.. It'll work
  13. V

    Design of multiple comparators

    Design a logic circuit that will take three 2-bit inputs. The output will be the three two bit inputs but in ascending order of their numerical value(assume that the numbers are in unsigned form).
  14. V

    can we use accelerometer for force measurement?

    Yeah... You can... Tie that accelerometer to a very hard membrane or skin. Then direct the punches to that skin or membrane.. I guess that should do it... But I'm not very sure

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