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Recent content by vishal_sonam

  1. V

    systemc in comparison to VHDl

    share with me some more point please.
  2. V

    systemc in comparison to VHDl

    Hello Can anybody explain me systemC in comparison to VHDL? Thanks
  3. V

    Rising edge of IN- what does it mean.

    this is my program. This is a system C program. #ifndef CRC_CALC_H #define CRC_CALC_H #include "systemc.h" #include "iostream" #include "iomanip" SC_MODULE(crc_calc) { // ports sc_in_clk clk; sc_in < bool > reset; sc_in < bool > crc_en; sc_in < bool > data_in; sc_out < sc_uint...
  4. V

    Rising edge of IN- maintains value of 1 how?

    Hello. I have a query. Suppose we have only 1 signal i.e., IN and it is on rising edge as I have understood rising edge mean mean TRUE means from 0 to 1 and then it will go down from 1 to 0 so for a very short time it will be maintained as 1.(0 to 1 then 1 to 1 and then 1 to 0) My question is...
  5. V

    Rising edge of IN- what does it mean.

    I am new to VHDL so please help me There are two signals RESET and IN. How should the sensitivity list look like if a method should be called on a rising edge of IN and on every change of RESET? I know about the sensitivity list and I understood the change of RESET also but what mean RISING...
  6. V

    function of Adder and MUX in the given

    What is the function of Adder and MUX in the given figure? Please give me the answer Thanks in Advance.
  7. V

    What is an “overlapped instruction execution”?

    Hello Please answer this question What is an “overlapped instruction execution” in pipeline ? Thanks in advance
  8. V

    I need to learn VHDL.

    Thank you so much and I hope your more advises in future :)
  9. V

    I need to learn VHDL.

    Hello guys, I need your suggestions. Please guide me in learning VHDL. Please tell me which VHDL tool I should download which is should be available in free.As I am beginner I need something easy and user friendly. Please recommend me any book. Thanks
  10. V

    I need help in VHDL. I am completely new to VHDL

    I want transparent latches
  11. V

    I need help in VHDL. I am completely new to VHDL

    but what should be the exact answer 4 or 5 d latches?
  12. V

    Complete the sensitivity list for process comb3 with all the necessary signals!

    if it is xyz please give me the explanation why? thanks
  13. V

    Making of Dual Band antenna

    Try to change the position of the slot in such a way that first freuqency should not be disturbed and you can work on the length and width of the slot also.
  14. V

    Which of these VHDL assignments are correct?

    hahahahahaha
  15. V

    Which of these VHDL assignments are correct?

    -- signal declaration: type T_Bit is integer; signal A : T_Bit; signal B : bit; signal C : bit_vector(3 downto 0); -- signal assignments: A <= B; B <= C(3); B <= C(2);
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