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Recent content by varun

  1. V

    VCD to ATE vector conversion

    Hello Sparso , You can check with the ATE vendors , or you can refer to vector Translations tools from Simutest , tool --> Verifier
  2. V

    Anyone help me about SoC Encounter

    check with the AE's of SoC encounter , refer to some university tutorials on SoC encounter , ASIC by Sebatian smith will help
  3. V

    What is the difference between Assura and Virtouso Layout?

    Hi Virtuoso helps you to draw the LAyout of cells ,memory,leads to full custom layout design,, While drawing the layout you sticking to the Foundry guidelines or rule files, How to verify it, then use the Assura , If youre a cadence user check with the support team .
  4. V

    What are interview questions based on CMOS IC layout?

    interveiw question what are interveiw question based on cmos ic layout ? -- Are you familiar with CMOS IC Layout Design like , what are the tools have you used , It could be from asking your to draw few cell layouts to a bigger examples Best is you refer to Alan Hastings verification of...
  5. V

    question about DRACULA LPE

    Check the error messages in the manual, verify with the LPE rule file
  6. V

    Which platform is best for EDA Tool?

    Hi Its Simple , WHich ever the EDA tool you want to use , open the datasheet of the tool , at the end of the datasheet will have these details to choose for the platform support. It depends on the need and the usage.
  7. V

    Various materials about FPGA

    Re: fpga materials Hi Try This **broken link removed**
  8. V

    ASIC COMPANIES IN INDIA

    winchip technologies chennai Marvel is in Gurgoan and LeelaPalace-Bangalore (a part of NatSem ) Added after 11 minutes: Some more new companies list can be found in the **broken link removed**
  9. V

    What are the differences between ASIC and SoC?

    soc and asic difference Refer the book titled on EDA , Added after 4 minutes: By contrast, an SOC is an IC dedicated to a specific application. It includes a compute engine (microprocessor core, digital signal processor core or graphics core), memory and logic on a single chip. There are...
  10. V

    For digital designers, Can u tell me which tool is that??

    this link will help you to understand all the EDA tools available with the info what youre looking for . https://www.deepchip.com
  11. V

    Logic Synthesis OverView

    https://www.srikiran.net/blog/2007/01/12/logic-synthesis-primer/
  12. V

    A basic question abt hold time.....plz help

    Refer this , **broken link removed**
  13. V

    Suggest me a good viewer for VCS

    find out vcs version try some free viewers from **broken link removed**
  14. V

    Altera , Xilinx doubt

    @ltera , Xilinx doubt Simplest answer : Refer to the device datasheet from Xilinx and Altera for those devices and you can get the idea to choose .
  15. V

    Cadence newbiein the inverter tutorial!

    Select the Symbol in the schematic and query ie press Q to query the Properties it should display the W & L values , otherwise Check the usermanuals for the command to query, if you need to query in the layout check the Trstor layout , highlight the POLY layer to find
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