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Recent content by vahid_e70

  1. V

    Wideband Gain=20 dB, UGBW=5GHz

    Hi ge, Thanks, I am working on a lab manual and it is necessary to get aforementioned specifications. And we don't want to use Op-Amp.As I mentioned I have found an structure with desired specs but I don't know how to redesign it,because I need design equations.
  2. V

    Wideband Gain=20 dB, UGBW=5GHz

    Dear friends, I am looking for a structure for a wideband amplifier(single stage is preferred) and my specifications are Gain=20dB, UGBW=5GHz. I found a basic structure on "https://sites.google.com/site/randomwok/Home/electronic-projects/wideband-pre-amplifier-using-discrete-transistor" but I...
  3. V

    How to add analog Verilog-A block in ADS

    Re: How to simulate Verilog-A in ADS hi.. I read your pdf .it was really useful but I have one problem... how can I compile "name.va",and where can I run that before adding in ADS? can you introduce a compiler for verilog-A? thanks alot...
  4. V

    verilog module in ADS

    hi all.... I want to know how it is possible to add a modul in agilent ADS that contains verilog code,I have some verilog code for some logical block but I dont know how can I make linke between verilog and ADS... I realy need that,please help me,,,,,,,,,,:sad:
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